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MMPF0100 Datasheet(PDF) 104 Page - NXP Semiconductors

Part # MMPF0100
Description  14 channel configurable power management integrated circuit
PDF  136 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100 Datasheet(HTML) 104 Page - NXP Semiconductors

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104
NXP Semiconductors
PF0100
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
SW4FAULTM
6
R/W
1
SW4 overcurrent interrupt mask bit
UNUSED
7
–
0
unused
Table 122. Register INTSENSE1 - ADDR 0x0A
Name
Bit #
R/W
Default
Description
SW1AFAULTS
0
R
0
SW1A overcurrent sense bit
• 0 = Normal operation
• 1 = Above current limit
SW1BFAULTS
1
R
0
SW1B overcurrent sense bit
• 0 = Normal operation
• 1 = Above current limit
SW1CFAULTS
2
R
0
SW1C overcurrent sense bit
• 0 = Normal operation
• 1 = Above current limit
SW2FAULTS
3
R
0
SW2 overcurrent sense bit
• 0 = Normal operation
• 1 = Above current limit
SW3AFAULTS
4
R
0
SW3A overcurrent sense bit
• 0 = Normal operation
• 1 = Above current limit
SW3BFAULTS
5
R
0
SW3B overcurrent sense bit
• 0 = Normal operation
• 1 = Above current limit
SW4FAULTS
6
R
0
SW4 overcurrent sense bit
• 0 = Normal operation
• 1 = Above current limit
UNUSED
7
–
0
unused
Table 123. Register INTSTAT3 - ADDR 0x0E
Name
Bit #
R/W
Default
Description
SWBSTFAULTI
0
R/W1C
0
SWBST overcurrent limit interrupt bit
UNUSED
6:1
–
0x00
unused
OTP_ECCI
7
R/W1C
0
OTP error interrupt bit
Table 124. Register INTMASK3 - ADDR 0x0F
Name
Bit #
R/W
Default
Description
SWBSTFAULTM
0
R/W
1
SWBST overcurrent limit interrupt mask bit
UNUSED
6:1
–
0x00
unused
OTP_ECCM
7
R/W
1
OTP error interrupt mask bit
Table 121. Register INTMASK1 - ADDR 0x09 (continued)
Name
Bit #
R/W
Default
Description



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