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LM5145 Datasheet(PDF) 27 Page - Texas Instruments

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Part # LM5145
Description  LM25143 3.5-V to 42-V Dual Synchronous Buck DC/DC Controller With Ultra-Low IQ
PDF  69 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM5145 Datasheet(HTML) 27 Page - Texas Instruments

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O
DCR
L
CS
DCR
OUT(CL)
CS
CS
L
1 s
R
I
V
(s)
R
I
1 s R
C
2
˜
'
§
·
˜
˜ ¨
¸
˜
˜
©
¹
(12)
Choose the CCS capacitance greater than or equal to 0.1 μF to maintain a low-impedance sensing network,
thus reducing the susceptibility of noise pickup from the switch node. Carefully observe the guidelines found in
Section 12.1 to make sure that noise and DC errors do not corrupt the differential current sense signals applied
between the CS and VOUT pins.
9.3.15 Hiccup Mode Current Limiting (RES)
The LM25143 includes an optional hiccup mode protection function that is enabled when a capacitor is
connected to the RES pin. In normal operation, the RES capacitor is discharged to ground. If 512 cycles of
cycle-by-cycle current limiting occurs, SS is pulled low and the HO and LO outputs are disabled (see Figure 9-6).
A 20-μA current source begins to charge the RES capacitor. When the RES voltage increases to 1.2 V, RES
is pulled low and the SS capacitor begins to charge. The 512-cycle hiccup counter is reset if four consecutive
switching cycles occur without exceeding the current limit threshold. Separate hiccup counters are provided for
each channel, but the RES pin is shared by both channels. One channel can be in hiccup protection while
the other operates normally. In the event that both channels are in an overcurrent condition triggering hiccup
protection, the last hiccup counter to expire pulls RES low and starts the RES capacitor charging cycle. Both
channels then restart together when VRES = 1.2 V. If RES is connected to VDDA at power up, the hiccup function
is disabled for both channels.
1.2 V RES threshold
IRES = 20 A
0 V
RES
SS
Current Limit
detected
ISS = 21 A
VREF = 0.6 V
Current Limit persists
during 512 consecutive
clock cycles
tRES
tSS
Hiccup delay
– no switching
Soft-start time
VFB + 150 mV
Figure 9-6. Hiccup Mode Timing Diagram
Use Equation 13 to calculate the RES capacitance.
RES
RES
C
(nF)
17 t
(ms)
˜
(13)
where
• tRES is the specified hiccup delay as shown in Figure 9-6.
9.3.16 High-Side and Low-Side Gate Drivers (HO1/2, LO1/2, HOL1/2, LOL1/2)
The LM25143 contains N-channel MOSFET gate drivers and an associated high-side level shifter to drive the
external N-channel MOSFET. The high-side gate driver works in conjunction with an external bootstrap diode,
www.ti.com
LM25143
SNVSC10 – MARCH 2022
Copyright © 2022 Texas Instruments Incorporated
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