LM5145 datasheet(28/69 Pages) TI

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DBST, and bootstrap capacitor, CBST. See Figure 9-7. During the conduction interval of the low-side MOSFET, the

SW voltage is approximately 0 V and CBST is charged from VCC through DBST. TI recommends a 0.1-μF ceramic

capacitor connected with short traces between the applicable HB and SW pins.

The LO and HO outputs are controlled with an adaptive dead-time methodology so that both outputs (HO and

LO) are never enabled at the same time, preventing cross conduction. When the controller commands LO to be

enabled, the adaptive dead-time logic first disables HO and waits for the HO-SW voltage to drop below 2.5 V

(typical). LO is then enabled after a small delay (HO fall to LO rising delay). Similarly, the HO turn-on is delayed

until the LO voltage has dropped below 2.5 V. HO is then enabled after a small delay (LO falling to HO rising

delay). This technique ensures adequate dead time for any size N-channel MOSFET component or parallel

MOSFET configurations.

Caution is advised when adding series gate resistors, as this can decrease the effective dead time. Each of

the high-side and low-side drivers has an independent driver source and sink output pins. This allows the

user to adjust drive strength to optimize the switching losses for maximum efficiency and control the slew rate

for reduced EMI signature. The selected N-channel high-side MOSFET determines the appropriate bootstrap

capacitance values, CBST, in Figure 9-7 according to Equation 14.

BST

(14)

where

• QG is the total gate charge of the high-side MOSFET at the applicable gate drive voltage.

• ΔVBST is the voltage variation of the high-side MOSFET driver after turn-on.

To determine CBST, choose ΔVBST so that the available gate drive voltage is not significantly impacted. An

acceptable range of ΔVBST is 100 mV to 300 mV. The bootstrap capacitor must be a low-ESR ceramic capacitor,

typically 0.1 µF. Use high-side and low-side MOSFETs with logic level gate threshold voltages.

VIN

VOUT

GND

VCC

Low-side

gate driver

High-side

gate driver

CBST

CIN

HOL

VCC

PGND

CVCC

LOL

RHO

DBST

RHOL

RLO

Figure 9-7. Integrated MOSFET Gate Drivers

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