AM625 datasheet(135/235 Pages) TI

135 / 235 page

Table 7-59. GPMC and NOR Flash Timing Requirements — Synchronous Mode

see Figure 7-45, Figure 7-46, and Figure 7-49

NO.

PARAMETER

DESCRIPTION

MODE(4)

MIN

MAX

MIN

MAX

UNIT

GPMC_FCLK =

100 MHz(1)

GPMC_FCLK =

133 MHz(1)

F12 tsu(dV-clkH)

Setup time, input data

GPMC_AD[15:0] valid before output

clock GPMC_CLK high

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

1.61

0.92

not_div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

0.86

3.41

F13 th(clkH-dV)

Hold time, input data

GPMC_AD[15:0] valid after output

clock GPMC_CLK high

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

2.09

not_div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

2.09

F21 tsu(waitV-clkH)

Setup time, input wait

GPMC_WAIT[j](2) (3) valid before

output clock GPMC_CLK high

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

1.61

0.92

not_div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

0.86

3.41

F22 th(clkH-waitV)

Hold time, input wait

GPMC_WAIT[j](2) (3) valid after

output clock GPMC_CLK high

div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

2.09

not_div_by_1_mode;

GPMC_FCLK_MUX;

TIMEPARAGRANULARITY_X1

2.09

(1)

GPMC_FCLK select

•

gpmc_fclk_sel[1:0] = 2b01 to select the 100MHz GPMC_FCLK

•

gpmc_fclk_sel[1:0] = 2b00 to select the 133MHz GPMC_FCLK

(2)

In GPMC_WAIT[j], j is equal to 0 or 1.

(3)

Wait monitoring support is limited to a WaitMonitoringTime value > 0. For a full description of wait monitoring feature, see General-

Purpose Memory Controller (GPMC) section in the device TRM.

(4)

For div_by_1_mode:

•

GPMC_CONFIG1_i Register: GPMCFCLKDIVIDER = 0h:

–

GPMC_CLK frequency = GPMC_FCLK frequency

For not_div_by_1_mode:

•

GPMC_CONFIG1_i Register: GPMCFCLKDIVIDER = 1h to 3h:

–

GPMC_CLK frequency = GPMC_FCLK frequency / (2 to 4)

For GPMC_FCLK_MUX:

•

CTRLMMR_GPMC_CLKSEL[1-0] CLK_SEL = 01 = PER1_PLL_CLKOUT / 3 = 300 / 3 = 100MHz

For TIMEPARAGRANULARITY_X1:

•

GPMC_CONFIG1_i Register: TIMEPARAGRANULARITY = 0h = x1 latencies (affecting RD/WRCYCLETIME, RD/

WRACCESSTIME, PAGEBURSTACCESSTIME, CSONTIME, CSRD/WROFFTIME, ADVONTIME, ADVRD/WROFFTIME,

OEONTIME, OEOFFTIME, WEONTIME, WEOFFTIME, CYCLE2CYCLEDELAY, BUSTURNAROUND, TIMEOUTSTARTVALUE,

WRDATAONADMUXBUS)

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AM625, AM623

SPRSP58 – JUNE 2022

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