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MEC1632 Datasheet(PDF) 201 Page - Microchip Technology |
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MEC1632 Datasheet(HTML) 201 Page - Microchip Technology |
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201 / 636 page ![]() 2012-2018 Microchip Technology Inc. DS00001592B-page 201 MEC1632 Note 10-8 • All examples assume that the SAEN configuration bit is 0. • “Q” indicates the bit remains set at the previous state. • *Not a standard sequence. • **XX = Anything except D1. • If multiple data bytes, set IBF and wait at state 0. Let the software know something unusual happened. • For data bytes, only D[1] is used; all other bits are don't care. Note 10-9 Refer to the GATEA20 Hardware Speed-up description for information on this register. A write to this register sets GATEA20. Note 10-10 Refer to the GATEA20 Hardware Speed-up description for information on this register. A write to this register re-sets GATEA20. 1 1 0 1 W W W W D1 D1 DD FF 0 0 0 0 Q Q 0 0 GATEA20 Turn-off Sequence(*) 1 1 1 W W W D1 XX** FF 0 1 1 Q Q Q Invalid Sequence TABLE 10-19: SETGA20L REGISTER HOST OFFSET NA 8-bit HOST SIZE EC OFFSET 108h 8-bit EC SIZE POWER VTR 00h nSYS_RST DEFAULT BUS LPC SPB BYTE3 BIT D7D6 D5D4 D3D2D1 D0 HOST TYPE - - - --- -- EC TYPE W BIT NAME TABLE 10-20: RSTGA20L REGISTER HOST OFFSET NA 8-bit HOST SIZE EC OFFSET 10Ch 8-bit EC SIZE POWER VTR 00h nSYS_RST DEFAULT BUS LPC SPB BYTE3 BIT D7D6 D5D4 D3D2D1 D0 HOST TYPE - - - --- -- EC TYPE W BIT NAME TABLE 10-18: GATEA20 COMMAND/DATA SEQUENCE EXAMPLES (CONTINUED) Data Byte R/W D[0:7] IBF FLAG GATEA20 Comments |
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