MEC1632 datasheet(207/636 Pages) MICROCHIP

207 / 636 page

 2012-2018 Microchip Technology Inc.

DS00001592B-page 207

MEC1632

Note 11-1

Byte 0 of this register is reserved.

Note 11-2

These registers return ‘0’ when read, writes have no effect.

11.4.1

POWER MANAGEMENT 1 STATUS 1 (PM1_STS 1)

RESERVED

Reserved bits return ‘0’ when read.

TABLE 11-2:

ACPI PM1 Block Interface REGISTER SUMMARY

Host Access

EC Access

Host I/O

Index

SPB Offset

Host

Type

SPB Offset

Byte

lane

EC Type

Notes

Power Management 1

Status Register 1

(PM1_STS) 1

00h

100h

Power Management 1

Status Register 2

(PM1_STS 2)

01h

R/WC

101h

R/W

Table 11-4

Note 11-4

Power Management 1

Enable Register 1

(PM1_EN 1)

02h

102h

Power Management 1

Enable Register 2

(PM1_EN 2)

03h

R/W

103h

Table 11-6

Note 11-5

Power Management 1

Control Register 1

(PM1_CNTRL 1)

04h

104h

Power Management 1

Control Register 2

(PM1_CNTRL 2)

05h

R/W

105h

Table 11-8

Note 11-6

Power Management 2

Control Register 1

(PM2_CNTRL 1)

06h

106h

Note 11-2

Power Management 2

Control Register 2

(PM2_CNTRL 2)

07h

107h

Note 11-2

EC_PM_STS Register

110h

R/W

TABLE 11-3:

POWER MANAGEMENT 1 STATUS REGISTER 1 (PM1_STS) 1

HOST OFFSET

8-bit HOST SIZE

EC OFFSET

100h

EC SIZE

POWER

VTR

00h

nSYS_RST

DEFAULT

BUS

LPC SPB

BYTE0 BIT

D7D6

D5D4

D3D2D1

HOST TYPE

RRR

EC TYPE

RRR

BIT NAME

Reserved

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