MEC1632 datasheet(110/636 Pages) MICROCHIP

110 / 636 page

MEC1632

DS00001592B-page 110

 2012-2018 Microchip Technology Inc.

Note 7-18

EC Clock Tree 0 remains ‘on’ whenever the ARC 625D Embedded Controller clock is running. None

of the blocks allocated to EC Clock Tree 0 have “Clock Required” Power Management Interface

outputs. EC Clock Tree 0 remains ‘off’ whenever the ARC 625D Embedded Controller is sleeping.

7.4.9.4

Control Bit Encoding

Power,

Clocks, and

Resets Reg-

ister Bank

Week Alarm

Interface

Analog to

Digital Con-

verter

16-Bit Timer

Interface

Timer 3

16-Bit Timer

Interface

Timer 1 - 2

RC Identifi-

cation

Detection

(RC_ID)

Host Inter-

face (LPC)

Two Pin

Serial Port

(UART)

Hibernation

Timer 0/1

Bank

VBAT-Pow-

ered Control

Interface

PECI Inter-

face

JTAG and

Boundary

Scan

DMA Con-

troller

PS/2 Device

Interface1

ACPI

Embedded

Controller

Interface

(ACPI-ECI) 0

- 1

Embedded

Memory

Interface

16-Bit Timer

Interface

Timer 0

–

Keyboard

Matrix Scan

Support

Trace FIFO

Debug Port

(TFDP)

––

8042 Emu-

lated Key-

board

Controller

RTC With

Date and

DST Adjust-

ment

EC Interrupt

Aggregator

–

PS/2 Device

Interface 0

PWM Con-

troller

5 - 15

––

ACPI PM1

Block Inter-

face

Host Gen-

eral Pur-

pose Serial

Peripheral

Interface

(GP-SPI)

Flash Mem-

ory

–EC General

Purpose

Serial

Peripheral

Interface

(GP-SPI)

TACH Moni-

tor

2 - 5

––

Port 80 BIOS

Debug Port

0 and 1

–

EEPROM

–

Input Cap-

ture and

Compare

Timer

––––

SRAM

–

HDMI-CEC

Interface

Controller

––––

–––

BC-Link

Master D

––––

TABLE 7-13:

CLOCK TREE FORCE CONTROL BITS ENCODING

Force ‘OFF’ Bit

Force ‘ON’ Bit

Description

Dynamic Clock Tree Gating enabled (Default) (Note 7-19).

Clock Tree Forced ‘On’

Clock Tree Forced ‘Off’

TABLE 7-12:

MASTER CLOCK TREE BLOCK ALLOCATION (CONTINUED)

Clock Tree

EC Clock

Tree 0

EC Clock

Tree 1

EC Clock

Tree 2

EC Clock

Tree 3

EC Clock

Tree 4

EC Clock

Tree 5

Host Clock

Tree 0

Host Clock

Tree 1

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