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MEC1632 Datasheet(PDF) 166 Page - Microchip Technology

Part # MEC1632
Description  Low Power 32-Bit Mobile Embedded Controller
PDF  636 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MEC1632 Datasheet(HTML) 166 Page - Microchip Technology

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MEC1632
DS00001592B-page 166
 2012-2018 Microchip Technology Inc.
MEMORY_WRITE_LIMIT_0[14:2]
Whenever a write of any byte in EC Data Register is attempted and bit 15 of EC_Address is 0, the field EC_Ad-
dress[14:2] in the EC Address Register is compared to this field. As long as EC_Address[14:2] is less than Memo-
ry_Write_Limit_0[14:2] the addressed bytes in the EC Data Register will be written into the DCCM. If EC_Address[14:2]
is greater than or equal to Memory_Write_Limit_0[14:2] no writes will take place.
8.6.11
MEMORY BASE ADDRESS 1 REGISTER
This register is accessible to the EC only.
MEMORY_BASE_ADDRESS_1[23:2]
This register defines the beginning of a region in the Embedded Controller’s Data Closely Coupled Memory that is
shared between the Host and the EC. The region defined by this base register, Region 1, is used when bit 15 of the EC
Address Register is 1. The access will be to a memory location at an offset defined by the contents of the EC Address
Register, relative to the beginning of the region defined by this register. Therefore, a read or write to the memory that is
triggered by the EC Data Register will occur at DCCM_Base_Address + Memory_Base_Address_1[23:2] + EC_Ad-
dress[14:2].
For example, if Region = 1, the Memory_Base_Address_1[23:2] = 1000h and the EC_Address[14:2] = 20h, then the
AHB address of the access will be 80_1020h.
TABLE 8-15:
MEMORY BASE ADDRESS 1 REGISTER
HOST OFFSET
N/A
N/A HOST SIZE
EC OFFSET
10Ch
32-bit EC SIZE
POWER
VTR
0000_0000h VTR POR DEFAULT
BUS
LPC SPB
BYTE3 BIT
D31
D30
D29
D28
D27
D26
D25
D24
HOST TYPE
-
----
-
-
-
EC TYPE
R
RRRRR
R
R
BIT NAME
Reserved
BYTE2 BIT
D23
D22
D21
D20
D19
D18
D17
D16
HOST TYPE
-
----
-
-
-
EC TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT NAME
Memory_Base_Address_1[23:16]
BYTE1 BIT
D15
D14
D13
D12
D11
D10
D9
D8
HOST TYPE
-
----
-
-
-
EC TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT NAME
Memory_Base_Address_1[15:8]
BYTE0 BIT
D7
D6D5
D4D3D2
D1
D0
HOST TYPE
-
----
-
-
-
EC TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R
R
BIT NAME
Memory_Base_Address_1[7:2]
Reserved



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