SM8521 datasheet(10/56 Pages) SHARP

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SM8521

- 10 -

Fig. 1 shows the SM85CPU register lineup. The CPU

internal register consists of eight 8-bit general purpose

registers (R0-R7), four 16-bit general purpose registers

(RR8-RR14), a program counter (PC) and four other

control registers. (The R0-R7 can be also used as

four 16-bit general purpose registers (RR8-RR14).)

GENERAL PURPOSE REGISTER

The eight 8-bit general purpose registers R0-R7 and

all eight 16-bit general purpose registers (RR0-

RR14) are available for use as accumulator, index

cannot be used as index register)

The other eight 8-bit registers R8-R15 cannot be used

as 8-bit general purpose register and as member of

the register file. (about register file, refer to "Address

Space.")

The feature of the SM85CPU architecture is that

general purpose registers are virtually allocated at

16-byte internal RAM. Actually, if the CPU accesses

general purpose registers, the designated RAM will

be accessed by the 5-bit register pointer (RP)

When RP = 00000B, the registers occupy the first

16 bytes starting at 0000H. Incrementing the field,

RP = 00001B, shifts the mapping by eight bytes so

that the registers start at 0008H. As a result, the

general purpose registers can be switched in 8-byte

unit to any RAM location within 0000H-00FFH.

Although the general purpose registers are members

of the register file, which stores the data onto

actual RAM, is different from the other members

(control registers).

That is, general purpose registers can be referred as

registers, as register file (allocated at 0000H-000FH)

and as RAM accessing by all addressing modes.

∗ About register pointer (RP), refer to "Processor status 0

(PS0)".

RR0

RR2

RR4

RR6

R10

R12

R14

RR8

RR10

RR12

RR14

R11

R13

R15

PS0

PS1

SYS

SPL

SPH

Fig. 1

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