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SM8521 Datasheet(PDF) 47 Page - Sharp Corporation |
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SM8521 Datasheet(HTML) 47 Page - Sharp Corporation |
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47 / 56 page ![]() SM8521 - 47 - UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER (UART) INTERFACE SM8521 supports 1-channel universal asynchronous receiver and transmitter interface (UART) . The UART interrupt has the following features. • Transmitter and receiver are independent each other, full duplex communication possible. • Receiver is consisted of duplex buffer, able to receive data continuously. • The dedicated register for baud rate generator is built-in. • It is possible to choose transfer format as following. • Stop bit : 1-bit/2-bit • Parity bit : even parity/odd parity/no parity • Receive error can be detected. • Frame error • Parity error • Overrun error NOTE : UART baud rate is fixed at [Timer 0 output/32]. Regarding Timer 0, refer to "8-Bit Timer Register TM0C". Data bus Receiver data register URTR Transmit data register URTT Control register URTC : A control register mapped by register file Receive data shift register P Status register URTS Interrupt request signal to bit IR03 (bit 3 : IR0) P Divider Timer 0 output (Divided by 16) TXD P70/RXD Fig. 25 UART Block Diagram |
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