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SM8521 Datasheet(PDF) 41 Page - Sharp Corporation |
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SM8521 Datasheet(HTML) 41 Page - Sharp Corporation |
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41 / 56 page ![]() SM8521 - 41 - SOUND GENERATOR The SM8521 supports two waveform generators concerning arbitrary waveform output channel and one noise generator channel. After each channel's signal is amplified through each variable register, a digital mixer mixes them into one and D/A outputs it. Address generator Scale counter Internal bus Internal bus Waveform generator Waveform generator Waveform memory Digital mixer D/A Sound output D/A direct output channel Noise sound generator (Random rectangular waveform) SG1 SG0 SG2 Fig. 19 Sound Generator Block Diagram • Waveform generator The data, 4-bit x 32 steps, stored in the waveform register (SGW0-15) is output at the timing of FCK (main clock) divided by time constant register. • Digital mixer 4-bit data generated from each generator is expanded to sixteen times as large as original 4-bit data. Those expanded data is added to one another after passing through digital attenuator (0, 1/32, 2/32, .... 31/32) of which attenuation rate is specified by output level control register. NOTE : Attention to the sum total of each sound generator, not exceeding capacity of digital mixer. • Noise sound register False noise, of which maximum frequency is based on cycle divided FCK (main clock) by time constant register, is output. • D/A direct output register (in digital mixer) When all sound generator 0, 1 and 2 are disable, the data stored in this register is directly effective as D/A input, provided that the data is stored in the SGDA register and both sound output enable register and D/A direct output enable registers are set. NOTE : All 12 bits of each SG0, SG1 and SG2 must not be filled with 0. If all 12 bits become 0, D/A can not perform correct output. |
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