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SM8521 Datasheet(PDF) 44 Page - Sharp Corporation |
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SM8521 Datasheet(HTML) 44 Page - Sharp Corporation |
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44 / 56 page ![]() SM8521 - 44 - Registers SGC (Control register) Bit 7 0 Bits 7 : Sound output enable Bits 6 to 4 : Set ‘0’. Bit 3 : D/A direct output enable Bit 2 : SG2 output enable Bit 1 : SG1 output enable Bit 0 : SG0 output enable SG0L, SG1L (Output level control register ; 0, 1/32, 2/32…31/32) Bit 7 0 (x = 0, 1) The value of output level control register decides the digital attention rate. SG0TL, SG1TL (Time constant register ; Low) Bit 7 0 (x = 0, 1) SG0TH, SG1TH (Time constant register ; High) Bit 7 0 (x = 0, 1) Bits 7 to 4 : Set ‘0’. A period of one step is variable based on the value of Time constant register (SG0TL, SG0TH, SG1TL and SG1TH composed of 12 bits.) SG0W0-15, SG1W0-15 (Waveform register 0-15) Bit 7 0 (x = 0, 1)(y = 0 to 15) Bits 7 to 4 : Waveform data Low order Bits 3 to 0 : Waveform data High order SG2L (Output level control register ; 0, 1/32, 2/32…31/32) Bit 7 0 Bits 7 to 5 : Set ‘0’. The value of output level control register decides the digital attenuation rate. SG2TL (Time constant register ; Low) Bit 7 0 SG2TH (Time constant register ; High) Bit 7 0 Bits 7 to 4 : Set ‘0’. A period of one step is variable based on the value of Time constant register (SG2TL and SG2TH composed of 12 bits). SGDA (D/A direct output register ; write only) Bit 7 0 The value of SGDA register directly transfers digital mixer. NOTES : • Time constant register must be written by "MOVW" instruction. • Each time constant register must not be filled with all "0" or only the Low significant bit is "1". SONDOUT --- DIROUT SG2OUT SG1OUT SG0OUT --- SG2L4 SG2L3 SG2L2 SG2L1 SG2L0 SG2TL7 SG2TL6 SG2TL5 SG2TL4 SG2TL3 SG2TL2 SG2TL1 SG2TL0 ---- SG2TH3 SG2TH2 SG2TH1 SG2TH0 SGDA7 SGDA6 SGDA5 SGDA4 SGDA3 SGDA2 SGDA1 SGDA0 --- SGxL4 SGxL3 SGxL2 SGxL1 SGxL0 SGxTL7 SGxTL6 SGxTL5 SGxTL4 SGxTL3 SGxTL2 SGxTL1 SGxTL0 ---- SGxTH3 SGxTH2 SGxTH1 SGxTH0 SGxWy7 SGxWy6 SGxWy5 SGxWy4 SGxWy3 SGxWy2 SGxWy1 SGxWy0 |
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