6.4 Thermal Information

THERMAL METRIC(1)

TPS54KB2x

UNIT

RZR (QFN, JEDEC)

RZR (QFN, EVM)

16 PINS

16 PINS

RθJA

Junction-to-ambient thermal resistance

36.8

16.5 ((2))

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

15.3

Not applicable (3)

°C/W

RθJB

Junction-to-board thermal resistance

7.6

Not applicable (3)

°C/W

ψJT

Junction-to-top characterization parameter

0.3

°C/W

ψJB

Junction-to-board characterization parameter

7.5

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

5.1

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

(2)

Measured on 4-layer, 2 oz copper, 3 inch × 3 inch EVM with 1.9-W dissipated in the device.

(3)

The thermal test or simulation setup is not applicable to a TI EVM layout.

6.5 Electrical Characteristics

TJ = –40°C to +125°C, VVCC = 3 V (internal), VVIN = 4 V to 16 V. Typical values are at TJ = 25°C and VVIN = 12 V (unless

otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY

IQ(VIN)

VIN quiescent current

Non-switching, VEN = 2 V, VFB = VFB_REG +

50 mV, no external bias on VCC pin

970

µA

IQ(VCC)

VCC quiescent current

TJ = 25°C, VIN = 12 V, VEN = 2 V, VFB

= VFB_REG + 10mV (non-switching), 3.3-

V external bias on VCC pin

860

µA

ISD(VIN)

VIN shutdown supply current

VIN = 12 V, VEN = 0 V, no external bias on

VCC pin

9.5

20

µA

ISD(VCC)

VCC shutdown current

VEN = 0 V, VIN = 0 V, 3.3-V external bias on

VCC pin

90

µA

IVCC

VCC external bias current

TJ = 25°C, VIN = 12 V, VEN = 2 V, regular

switching, RMSEL = 10.5 kΩ, fSW = 800kHz,

3.3-V external bias on VCC pin

12

mA

TJ = 25°C, VIN = 12 V, VEN = 2 V, regular

switching, RMSEL = 13.3 kΩ, fSW = 1100 kHz,

3.3-V external bias on VCC pin

14

mA

TJ = 25°C, VIN = 12 V, VEN = 2 V, regular

switching, RMSEL = 30.1 kΩ, fSW = 1400

kHz, 3.3 V external bias on VCC pin

19

mA

UVLO

VINUVLO(R)

VIN UVLO rising threshold

VIN rising

3.92

3.99

V

VINUVLO(H)

VIN UVLO hysteresis

0.15

V

ENABLE

VEN(R)

EN voltage rising threshold

EN rising, enable switching

1.15

1.2

1.25

V

VEN(F)

EN voltage falling threshold

EN falling, disable switching

0.95

1

1.05

V

VEN(H)

EN voltage hysteresis

0.2

V

EN internal pull-down resistance

EN pin to AGND

0.74

1

1.27

MΩ

VENSTB(R)

EN standby rising threshold

EN rising, enable internal LDO, no switching

0.7

V

INTERNAL LDO (VCC)

VVCC

Internal LDO output voltage

2.85

3.0

3.1

V

IVCC

Internal LDO short-circuit current limit

VVIN = 12V

50

180

mA

VCCUVLO(R)

VCC UVLO rising threshold

2.8

2.85

V

VCCUVLO(F)

VCC UVLO falling threshold

2.65

V

VCCUVLO(H)

VCC UVLO hysteresis

0.15

V

FB threshold to turn off VCC LDO

EN high to low

50

85

mV

REFERENCE VOLTAGE (FB)

www.ti.com

TPS54KB20

SLVSGP3 – MAY 2023

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