6.5 Electrical Characteristics (continued)

TJ = –40°C to +125°C, VVCC = 3 V (internal), VVIN = 4 V to 16 V. Typical values are at TJ = 25°C and VVIN = 12 V (unless

otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VFB_REG

Feedback regulation voltage

TPS54KB20 and TPS54KB22

895.5

900

904.5

mV

TPS54KB20 and TPS54KB22, TJ = –40°C

to +150°C

894.6

900

905.4

mV

VFB_REG

Feedback regulation voltage

TPS54KB21 and TPS54KB23

500

mV

TPS54KB21 and TPS54KB23, TJ = –40°C

to +150°C

500

mV

IFB(LKG)

FB input leakage current

VFB = VFB_REG

160

nA

DIFFERENTIAL REMOTE SENSE AMPLIFIER

IGOSNS

Leakage current out of GOSNS pin

VGOSNS - VAGND = 100 mV

80

µA

VICM

GOSNS common mode voltage for

regulation

VGOSNS versus VAGND

–0.1

0.1

V

SWITCHING FREQUENCY

fSW(FCCM)

Switching frequency, FCCM operation

VVIN = 12 V, VOUT = 3.3 V, RMSEL = 10.5 kΩ,

No load

680

800

920

kHz

VVIN = 12 V, VOUT = 3.3 V, RMSEL = 24.9 kΩ,

No load

935

1100

1265

kHz

VVIN = 12 V, VOUT = 3.3 V, RMSEL = 48.7 kΩ,

No load

1190

1400

1610

kHz

STARTUP

ISS

Soft-start charge current

VSS = 0 V

31

36

41

µA

VSS(DONE)

Soft-start voltage threshold for soft-start

done

TPS54KB21 and TPS54KB23

0.99

V

VSS(DONE)

Soft-start voltage threshold for soft-start

done

TPS54KB20 and TPS54KB22

1.22

V

EN HIGH to start of switching delay

CSS = 22 nF, Internal VCC, CVCC = 1 µF,

RMSEL = 86.6 kΩ, Measured from EN high to

VSS = 50 mV

500

µs

POWER STAGE

RDSON(HS)

High-side MOSFET on-resistance

VBOOT-SW = 3.3 V

5.8

mΩ

RDSON(LS)

Low-side MOSFET on-resistance

VVCC = 3.3 V

2.3

mΩ

tON(min)

Minimum ON pulse width

25

ns

tOFF(min)

Minimum OFF pulse width

150

ns

BOOT CIRCUIT

IBOOT(LKG)

Leakage current into BOOT pin

VBOOT-SW = 3 V, Enabled, Not switching.

30

µA

OVERCURRENT PROTECTION

OC limit high clamp

Valley current on LS FET, 0 Ω ≤ RILIM ≤ 4.32

kΩ

27.5

30.0

A

ILS(OC)

Low-side valley current limit

Valley current on LS FET, RILIM = 4.32 kΩ

25

27.5

30.0

A

Valley current on LS FET, RILIM = 5.36 kΩ

20.2

22.4

24.6

A

Valley current on LS FET, RILIM = 7.32 kΩ

14.8

16.4

18.0

A

Valley current on LS FET, RILIM = 10.7 kΩ

9.8

11.2

12.6

A

Valley current on LS FET, RILIM = 20 kΩ

5.1

6

6.9

A

ILS(NOC)

Low-side negative current limit

Sinking current limit on LS FET

–10

–8

A

RILIM

ILIM pin resistance range

0

20

kΩ

IZC

Zero-cross detection current threshold to

enter DCM, open loop

VIN = 12 V

–750

mA

IZC(HYS)

Zero-cross detection current threshold

hysteresis after entering DCM, open loop

VIN = 12 V

1000

mA

OUTPUT OVP AND UVP

VOVP

Overvoltage-protection (OVP) threshold

voltage

VFB rising

113%

116%

119%

tOVPDLY

OVP delay

With 100-mV overdrive

400

ns

TPS54KB20

SLVSGP3 – MAY 2023

www.ti.com

6

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