RILIM=

KOCL

IOCLIM−12× VIN−VO ×VO

VIN × 1L×fSW

(4)

where

• IOCLIM is overcurrent limit threshold for load current in A

• RILIM is ILIM resistor value in Ω

• KOCL is a constant of 120×103 for the calculation

• VIN is input voltage value in V

• VO is output voltage value in V

• L is output inductor value in µH

• fSW is switching frequency in MHz

IOCLIM=KOCLRILIM+12× VIN−VO×VO

VIN × 1L×fSW

(5)

7.3.11 Low-side MOSFET Negative Current Limit

The device has a fixed, cycle-by-cycle negative overcurrent limit (ILS(NOC)). Similar with the positive overcurrent

limit, the inductor current is monitored during the on-time of the low-side MOSFET. To prevent too large negative

current flowing through the low-side MOSFET, when the device detects a –10-A current (typical threshold)

through the low-side MOSFET, the device turns off the low-side MOSFET and then turns on the high-side

MOSFET for the on-time set by the one-shot timer (determined by VIN/VOUT/fSW). After the high-side MOSFET

on-time expires, the low-side MOSFET turns on again.

The device must not trigger the –10-A negative current limit threshold during nominal operation, unless a small

inductor value that is too small is chosen or the inductor becomes saturated. This negative current limit is used

to discharge output capacitors after an output OVP event. See Overvoltage and Undervoltage for details.

7.3.12 Overvoltage and Undervoltage Protection

The device monitors a resistor-divided feedback voltage to detect overvoltage and undervoltage events. The

OVP function enables when the output is enabled. The UVP function enables after the soft-start period is

complete.

After soft-start is complete, if the FB voltage becomes lower than 80% of the VREF voltage, the UVP comparator

trips and an internal UVP delay counter begins counting. After the 70-µs UVP delay time, depending on the

part number, the device will either hiccup or latch off. The TPS54KB22 and TPS54KB23 enter hiccup mode and

re-start after a sleep time of 7× the soft-start period. The TPS54KB20 and TPS54KB21 latch off both high-side

and low-side MOSFETs drivers. The latch-off fault can be cleared with a reset of VIN or by toggling the EN pin.

When the output is enabled, the FB voltage must rise above the 92.5% PG low-to-high threshold to clear the

UVP comparator. If the FB voltage does not exceed the 92.5% threshold by the end of the soft-start period, the

device will respond to the undervoltage event.

During the UVP delay time, if the FB voltage becomes higher than the 92.5% PG low-to-high threshold, the

undervoltage event is cleared and the timer is reset to zero. When the output voltage falls below the 80% UVP

threshold again, the 70-μs timer re-starts.

When the FB voltage becomes higher than 116% of the VREF voltage, the OVP comparator trips and the circuit

latches the fault condition and drives the PG pin low. The high-side MOSFET turns off and the low-side MOSFET

turns on until reaching a negative current limit INOCL. Upon reaching the negative current limit, the low-side

MOSFET is turned off, and the high-side MOSFET is turned on again, for a proper on-time (determined by

VO/VIN/fSW). The device operates in this cycle until the output voltage is pulled down under the UVP threshold.

The device then responds to the undervoltage event as described above.

If there is an overvoltage condition prior to the output being enabled (such as a high pre-biased output), the

device responds to the overvoltage event as described above at the beginning of the soft-start period. The

device waits until the completion of the soft-start period for UVP to be enabled then, depending on the part

TPS54KB20

SLVSGP3 – MAY 2023

www.ti.com

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