7.3.3 Adjustable Soft Start

The device implements an externally adjustable soft start set by the external soft-start capacitor (CSS) connected

between the SS and AGND pins. The SS pin has a 36-µA internal pullup current source (ISS) that charges

CSS. The FB voltage follows the SS pin voltage with a small offset. When the SS pin voltage is near the

internal reference voltage, a smooth transition occurs to FB being regulated to the internal reference. The device

soft-start period is complete when the SS pin voltage reaches VSS(DONE) given in the Electrical Characteristics

table.

The CSS value can be determined by Equation 1. The soft-start capacitor must be in the range of 10 nF to 1 µF.

TI does not recommend leaving the SS pin open. The soft-start time is typically selected to either satisfy timing

requirements in the system or to minimize inrush current to charge the output capacitors during start-up.

CSS=tSS×ISS

VFB_REG

(1)

If during normal operation VIN goes below its UVLO, VCC goes below its UVLO, the EN pin is pulled below

the VEN(F) threshold, the output turns off due to under voltage protection or a thermal shutdown event occurs,

the device stops switching and an internal discharge path is enabled to discharge the SS pin capacitance. This

internal discharge path remains active as long as there is sufficient VCC to enable it, typically 1.5 V. The internal

discharge path is disabled when the device enters the soft-start period during power up.

CSS also sets the hiccup wait-time before a restart attempt for the TPS54KB22 and TPS54KB23 devices. After a

fault triggers the hiccup response the soft-start capacitor is discharged through the internal discharge path, then

recharged with the internal pull-up current source to VSS(DONE) seven times. This response sets the hiccup wait

time to 7×tSS.

7.3.4 Power Good

The device has a power-good (PG or PGOOD) output that goes high to indicate when the converter output is in

regulation. The power-good output is an open-drain output and must be pulled up to the VCC pin or an external

voltage source (< 5.5 V) through a pullup resistor (typically 30.1 kΩ) to go high. The recommended power-good

pullup resistor value is 1 kΩ to 100 kΩ.

After the soft-start ramp finishes, the power-good signal becomes high after a 1-ms internal delay. An internal

soft-start done signal goes high when the SS pin voltage reaches VSS(DONE) to indicate the soft-start ramp

has finished. If the FB voltage drops to 80% of the VREF voltage or exceeds 116% of the VREF voltage, the

power-good signal latches low after a 3-µs internal delay. The power-good signal can only be pulled high again

after re-toggling EN or a reset of VIN.

If an OV event causes the FB voltage to exceed the OV threshold during soft-start, but the FB voltage drops

below the OV threshold before soft-start is completed, the power-good signal does not latch low until FB

exceeds the OV threshold or drops below UV threshold. The OV or UV event must occur after the soft-start ramp

finishes for the power-good signal to latch low. FB exceeding the OV threshold during soft-start does, however,

trigger the OV fault, and the devices response to OV (described in Section 7.3.12) typically pulls the output

voltage below the UV threshold.

If the input supply fails to power up the device (for example VIN and VCC both stay at zero volts) and this pin

is pulled up through an external resistor, the power-good pin clamps itself low to the low-level specified in the

POWER GOOD section in the Electrical Characteristics.

7.3.5 Output Voltage Setting

The output voltage is programmed by the voltage-divider resistors, RFB_T and RFB_B. Connect RFB_T between the

FB pin and the positive node of the load, and connect RFB_B between the FB pin and GOSNS pin. The FB pin is

regulated to the internal reference (VREF). The recommended RFB_B value is 10 kΩ, ranging from 1 kΩ to 20 kΩ.

Determine RFB_T by using Equation 2.

RFB_T=VO−VFB_REG

VFB_REG ×RFB_B

(2)

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TPS54KB20

SLVSGP3 – MAY 2023

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