To improve the overall VOUT accuracy, using a ±1% accuracy or better resistor for the FB voltage divider is highly

recommended. Regardless of remote sensing or single-ended sensing, the FB voltage divider, RFB_T and RFB_B,

should be always placed as close as possible to the device.

7.3.6 Remote Sense

The device integrates a remote sense amplifier across the FB and GOSNS pins. The remote sense function

compensates for voltage drop on the PCB traces helping to maintain VOUT accuracy under steady state

operation and load transient events. The VOUT connection of the remote sensing signal must be connected

to the feedback resistor divider with the lower feedback resistor, RFB_LS, terminated at the GOSNS pin.

The FB voltage divider resistors must be kept near the device to minimize the trace length connected to the FB

pin. The connections from the FB voltage divider resistors and the GOSNS pin to the remote location must be a

pair of PCB traces with Kelvin sensing across a bypass capacitor of 0.1 μF or higher. To maintain stable output

voltage and minimize the ripple, the pair of remote sensing lines must stay away from any noise sources such as

inductor and SW nodes, or high frequency clock lines. TI recommends to shield the pair of remote sensing lines

with ground planes above and below.

Single-ended VOUT sensing is often used for local sensing. For this configuration, connect the higher FB resistor,

RFB_HS, to a high-frequency local bypass capacitor of 0.1 μF or higher, and short GOSNS to AGND.

The recommended GOSNS operating range (relative to the AGND pin) is –100 mV to +100 mV.

7.3.7 D-CAP4 Control

The device uses D-CAP4 control to achieve a fast load transient response while maintaining ease-of-use.

The D-CAP4 control architecture includes an internal ripple generation network enabling the use of very low-

ESR output capacitors such as multi-layered ceramic capacitors (MLCC) and low ESR polymer capacitors.

No external current sensing network or voltage compensators are required with D-CAP4 control architecture.

The role of the internal ripple generation network is to emulate the ripple component of the inductor current

information and then combine it with the voltage feedback signal to regulate the loop operation.

D-CAP4 control architecture reduces loop gain variation across VOUT, enabling a fast load transient response

across the entire output voltage range with one ramp setting. The R-C time-constant of the internal ramp circuit

sets the zero frequency of the ramp, similar to other R-C based internal ramp generation architectures. The

reduced variation in loop gain also mitigates the need for a feedforward capacitor to optimize the transient

response. The ramp amplitude varies with VIN to minimize variation in loop gain across input voltage, commonly

referred to as input voltage feedforward. Table 7-1 shows how the ramp amplitude and ramp zero are selected

through a resistor at the MSEL pin. Lastly the device uses internal circuitry to correct for the dc offset caused by

the injected ramp, and significantly reduces the dc offset caused by the output ripple voltage, especially with light

load current.

For any control topologies supporting no external compensation there is a minimum range, maximum range, or

both, for the output filter it can support. The output filter used for a typical buck converter is a low-pass L-C

circuit. This L-C filter has double pole that is described in Equation 3.

=

´ p ´

´

P

OUT

OUT

1

f

2

L

C

(3)

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal

gain of the device. The low frequency L-C double pole has a 180-degree drop in phase. At the output filter

frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. The internal ripple

generation network introduces a high-frequency zero that reduces the gain roll off from –40 dB to –20 dB per

decade and increases the phase by 90 degrees per decade above the zero frequency.

After identifying the application requirements, the output inductance is typically designed so the inductor peak-to-

peak ripple current is approximately between 15% and 40% of the maximum output current in the application.

The inductor and capacitor selected for the output filter must be such that the double pole of Equation 3 is

located no higher than 1/30th of the steady-state operating frequency. Choosing very small output capacitance

TPS54KB20

SLVSGP3 – MAY 2023

www.ti.com

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