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EB632 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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EB632 Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 112 page  HDI16 Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2 Freescale Semiconductor 35 The host processor acknowledges host interrupts by executing an interrupt service routine. The host processor tests the appropriate status bit (TXDE, TXDE16, TXDE32, RXDF, RXDF16, or RXDF32, depending on the application) to determine the interrupt source. The host processor interrupt service routine must read or write the appropriate HDI16 data register to clear the interrupt. HREQ is deasserted under the following conditions: • The enabled request is cleared or masked. • The SC140 core is reset. Figure 10. HDI16 Host Request Structure TREQ RREQ ICR[8–15] 815 INIT 8 15 TRDY TXDE RXDF ISR[8–15] HREQ Host Request Asserted HREQ ICR[0–7] 01 0 1 HRRA HTRA ISR[0–7] RXDF16 HTRQ HRRQ TXDE32TXDE16 RXDF32 |
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