EB632 datasheet(36/112 Pages) FREESCALE

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Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2

Freescale Semiconductor

DMA Transfer Code Definitions

10 DMA Transfer Code Definitions

The TC code definitions for mask sets 2K42A and 2K87M are as follows:

11 Interrupt System

11.1 SCPRR_L and SCPRR_L_EXT Changes

For mask set 2K87M, the TC layer interrupts are configured with the SCCs using the YCC entries defined by the

CPM Low Interrupt Priority Registers (SCPRR_L and SCPRR_L_EXT). For the fields YC1P–YC8P in each

YCCn position.”

11.2 TC Layer Interrupts

The TC layer accesses use interrupt vector 44 (this was reserved for mask set 2K42A).

12 Debugging

12.1 JTAG ID Changes

The JTAG ID value for the 2K42A mask set is 0x0188201D. The JTAG ID value for the 2K87M mask set is

0x1188201D.

12.2 EOnCE Status Register (ESR) Values

For the 2K42A mask set, ESR[REVNO] = 1 and ESR[CORETP] =1. For the 2K87M mask, ESR[REVNO] = 2 and

ESR[CORETP] = 2.

12.3 EOnCE Counter Register Values

For the 2K42A mask set, the Event Counter Value Register (ECNT_VAL) and the Extension Counter Value

(MSB) of these registers is hard-wired to 0, limiting the maximum register value to 0x7FFFFFFF. When reading

either register, the MSB is always zero. For future compatibility, always write a 0 to the MSB of these registers.

Table 31. Transfer Code Encoding

TC[0–2]

2K42A

2K87M

000

Reserved

001

Reserved

010

Reserved

011

Reserved

100

Reserved

DMA function code 0

101

SC140 core

SC140 core/DMA function code 1

110

SDMA/DMA function code 0

SDMA

111

SDMA/DMA function code 1

SDMA

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