EB632 datasheet(50/112 Pages) FREESCALE

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Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2

Freescale Semiconductor

CPM

14.4.16 TC Layer General Registers

The TC layer general registers are distributed to all of the TC blocks. Each TC block is represented by specific bits.

When accessing a general register, each TC block is responsible only for its bits.

14.4.17 TC Layer General Event Register (TCGER)

The TC layer general event register (TCGER), shown in Figure 21, summarizes the events for all the TC blocks.

Each bit stands for an ORed event register of a TC block. When a bit is set, it indicates that one or more event bits

are set in the corresponding TC block event register.

Table 37 describes TCGER fields.

14.4.18 TC Layer General Status Register (TCGSR)

Figure 22 shows the TC layer general status register (TCGSR), which records the cell delineation and transmit

FIFO status for all TC blocks.

Bit

0123

4567

Field

TC1

—

TC6

TC7

TC8

—

Reset

0000

000

R/W

Figure 21. TCGER

Table 37.

TCGER Field Descriptions

Name

Description

Settings

TC1

TC1 Event

Indicates whether a TC layer 1 event occurred.

No event.

One or more bits are set in TC1 event

—

1–4

Reserved. Write to 0 for future compatibility.

TC6

TC6 Event

Indicates whether a TC layer 6 event occurred.

No event.

One or more bits are set in TC6 event

TC7

TC7 Event

Indicates whether a TC layer 7 event occurred.

No event.

One or more bits are set in TC7 event

TC8

TC8 Event

Indicates whether a TC layer 8 event occurred.

No event.

One or more bits are set in TC8 event

—

8–15

Reserved. Write to 0 for future compatibility.

Bit

0123

4567

Field

CD1

—

CD6

CD7

CD8

—

Reset

0000

000

R/W

Figure 22. TCGSR

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