EB632 datasheet(6/112 Pages) FREESCALE

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Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2

Freescale Semiconductor

Reset

The 2K42A mask set offers two options for programming the Hard Reset Configuration Word (HRCW). The

2K87M mask set offers three options. In addition, the structure of the HRCW itself is different between the two

mask sets.

4.1

Reset Configuration Options

Table 4 shows the options for programming the HRCW for each of the mask sets.

4.1.1 Configuration Modes

The 2K42A mask set defines the configuration modes as shown in Table 5.

The 2K87M mask set adds a third “reduced reset configuration” method of programming the reset configuration

word, in addition to the host reset and hardware reset configuration methods.

4.1.2 Reduced Reset Configuration Information for Mask Set 2K87M

Reduced reset configuration is executed for serial boot only. Only the NMI_OUT (bit 12), ISB (bits 13–15),

SWDIS (bit 26), and DLLDIS (bit 27) fields in the Hard Reset Configuration Word (HRCW) can be programmed

using this method. The rest of the bits are programmed to their default values, but they can be reprogrammed later

after reset. Table 7 describes the 2K87M mask set hard reset configuration word. .

Table 4. HRCW Programming Options by Mask Set

2K42A

2K87M

Host reset. Through the HDI16 from a host

Hardware reset. Through the system bus from external memory

Host reset. Through the HDI16 from a host.

Hardware reset. Through the system bus from external memory.

Reduced reset. From a serial EPROM using the I2C protocol. Limited

fields of the hard reset configuration word are configured via the

appropriate data bus bits on the system bus.

Table 5. MSC8101 2K42A Mask Set Reset Configuration Modes

RSTCONF

HPE/EE1

BTM[0-1]/

EE[4-5]

Mode

host reset configuration

master hardware reset configuration

slave hardware reset configuration

Table 6. MSC8103 2K87M Mask Set Reset Configuration Modes

RSTCONF

HPE/EE1

BTM[0-1]/

EE[4-5]

Mode

host reset configuration

master hardware reset configuration

slave hardware reset configuration

master reduced reset configuration

slave reduced reset configuration

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