EB632 datasheet(11/112 Pages) FREESCALE

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Boot

Functional Differences Between MSC8101 (Mask 2K42A) and MSC8103 (Mask 2K87M), Rev. 2

Freescale Semiconductor

In addition, the following rules apply:

•

The source data must be in big-endian format, with the most significant part at the lower-order address.

•

To enable checksum, set the CSE bit. To disable checksum, clear the CSE bit.

•

Block size includes the checksum and checksum.

•

Each address must be aligned on a 16-byte boundary.

•

Maximum size for a block is 64 KB.

•

Checksum is performed on all block words, including addresses and sizes.

•

The block size should be a multiple of 32 bits.

•

If the next block address is 0x0, the bootloader treats the next block as sequential.

•

All addresses should be located in SRAM. The address should be given as a DSP internal address.

The end of the boot code stream is indicated by a special boot end block with the structure shown in Table 9.

The first two words indicate the end of the source blocks. At least one block of source code must be loaded when

the bootloader is invoked. The boot start address indicates the address at which the boot program execution starts.

This address must be aligned on a 16-byte boundary. The bootloader routine expects at least one code block in

addition to the boot end block. The sequence is repeated for subsequent blocks, until the final block in the data

stream is reached.

5.6

Load Procedure

The bootloader program uses the I2C serial interface to access data in the EPROM and to program the I2C

parameter RAM and registers. The I2C uses BDs and buffers to read and write data. The bootloader prepares and

keeps track of the BDs and buffers for program loading.

To enable multi-master support, the first 14 bytes of the EPROM are reserved for an address table, which is also

accessed in single-master mode. The table entries contain the location of the boot code.The loading process starts

by calculating the entry address and reading the boot code location address. Then the code loading starts by reading

the first 4 block words from the EPROM. The size of block, where to load it, the location of the next block in

EPROM, and checksum enable are extracted.

Bit

123456789

Description

CSE

Block Size

Notes:

CSE = checksum enable. Set this bit when a checksum comparison is needed.

Since the EPROMS that support the I2C protocol are small, 15 bits are sufficient to define the block size.

Figure 2. Checksum Enable Bit + Block Size

Table 9. Structure of the Boot End Block

Word

Description

10x0000

20x0000

Boot start address, most significant part

Boot start address, least significant part

50x0000

60x0000

Checksum—xor

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