AD9271 datasheet(42/58 Pages) AD

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AD9271

Preliminary Technical Data

Rev. PrA | Page 42 of 58

EVALUATION BOARD

The AD9271 evaluation board provides all of the support circuitry

required to operate the ADC in its various modes and configur-

ations. The LNA is driven differentially through a transformer.

Figure 65 shows the typical bench characterization setup used

to evaluate the ac performance of the AD9271. It is critical that

the signal sources used for the analog input and clock have very

low phase noise (<1 ps rms jitter) to realize the optimum

performance of the signal chain. Proper filtering of the analog

input signal

to remove harmonics and lower the integrated or broadband

noise at the input is also necessary to achieve the specified noise

performance.

See Figure x to Figure x for the complete schematics and layout

diagrams that demonstrate the routing and grounding techniques

that should be applied at the system level.

POWER SUPPLIES

This evaluation board comes with a wall-mountable switching

power supply that provides a 6 V, 2 A maximum output. Simply

connect the supply to the rated 100 V ac to 240 V ac wall outlet

at 47 Hz to 63 Hz. The other end is a 2.1 mm inner diameter

jack that connects to the PCB at P701. Once on the PC board,

the 6 V supply is fused and conditioned before connecting to

three low dropout linear regulators that supply the proper bias

to each of the various sections on the board.

When operating the evaluation board in a nondefault condition,

L702 to L704 can be removed to disconnect the switching

power supply. This enables the user to bias each section of the

board individually. Use P501 to connect a different supply for

each section. At least one 1.8 V supply is needed with a 1 A current

capability for AVDD_DUT and DRVDD_DUT; however, it is

recommended that separate supplies be used for both analog

and digital domains. To operate the evaluation board using the

SPI and alternate clock options, a separate 3.3 V analog supply

is needed in addition to the other supplies. The 3.3 V supply, or

AVDD_3.3 V, should have a 1 A current capability.

To bias the crosspoint switch circuitry or CW section, separate

+5 V and −5 V supplies are required. These should have 1 A

current capability each. This section cannot be biased from a

6 V, 2 A wall supply. Separate supplies are required.

INPUT SIGNALS

When connecting the clock and analog source, use clean signal

generators with low phase noise, such as Rohde & Schwarz SMHU

or HP8644 signal generators or the equivalent. Use a 1 m, shielded,

RG-58, 50 Ω coaxial cable for making connections to the evalu-

ation board. Enter the desired frequency and amplitude from the

specifications tables. The evaluation board is set up to be clocked

from the crystal oscillator, OSC401. If a different or external clock

source is desired, follow the instructions for CLOCK outlined in

the Default Operation and Jumper Selection Settings section.

Typically, most Analog Devices evaluation boards can accept

~2.8 V p-p or 13 dBm sine wave input for the clock. When

connecting the analog input source, it is recommended to use a

multipole, narrow-band, band-pass filter with 50 Ω

terminations. Analog Devices uses TTE and K&L Microwave,

Inc., band-pass filters. The filter should be connected directly to

the evaluation board.

OUTPUT SIGNALS

The default setup uses the HSC-ADC-FPGA-8 high speed

deserialization board to deserialize the digital output data and

convert it to parallel CMOS. These two channels interface

directly with the Analog Devices standard dual-channel FIFO

data capture board (HSC-ADC-EVALB-DC). Two of the eight

channels can then be evaluated at the same time. For more

information on channel settings on these boards and their

optional settings, visit www.analog.com/FIFO.

ROHDE & SCHWARZ,

SMHU,

2V p-p SIGNAL

SYNTHESIZER

ROHDE & SCHWARZ,

FS5A20

SPECTRUM

ANALYZER

BAND-PASS

FILTER

CHA TO CHH

12-BIT

SERIAL

LVDS

2 CH

12-BIT

PARALLEL

CMOS

USB

CONNECTION

AD9271

HSC-ADC-FPGA-8

HIGH SPEED

DESERIALIZATION

BOARD

HSC-ADC-EVALB-DC

FIFO DATA

CAPTURE

BOARD

RUNNING

ADC

ANALYZER

AND SPI

USER

SOFTWARE

1.8V

–+

1.8V

6V DC

2A MAX

VFAC3

OSCILLATOR

WALL OUTLET

100V TO 240V AC

47Hz TO 63Hz

SWITCHING

POWER

SUPPLY

–+

3.3V

–+

3.3V

–+

1.5V

–+

3.3V

SPI

ANALOG INPUT

CW OUTPUT

CLK

EVALUATION BOARD

Figure 65. Evaluation Board Connection

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