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Preliminary Technical Data

AD9271

Rev. PrA | Page 21 of 58

LNA

LI-X

LG-X

LO-X

DOUT – X

DOUT + X

CLG

CFB RFB2

CSH

GAIN

INTERPOLATOR

SERIAL PORT

INTERFACE

LOSW-X

RFB1

SWITCH

ARRAY

CDW+

CDW–

ATTENUATOR

–30dB TO 0dB

12-BIT

PIPELINE

ADC

SERIAL

LVDS

+24dB

AAF

AD9271

Figure 33. Simplified Block Diagram of Single Channel

CHANNEL OVERVIEW

Each channel contains both a TGC and CW Doppler signal

path. Common to both signal paths, the LNA provides user-

adjustable input impedance termination. The CW Doppler path

includes a transconductance amplifier and crosspoint switch.

The TGC path includes a differential X-AMP® VGA, an

antialiasing filter, and an ADC. Figure 33 shows a simplified

block diagram with external components.

The signal path is fully differential throughout to maximize

signal swing and reduce even-order distortion; however, the

LNA is designed to be driven from a single-ended signal source.

Low Noise Amplifier (LNA)

Good noise performance relies on a proprietary ultralow noise

LNA at the beginning of the signal chain, which minimizes the

noise contribution in the following VGA. Active impedance

control optimizes noise performance for applications that benefit

from input impedance matching.

A simplified schematic of the LNA is shown in Figure 34. LI-x is

capacitively coupled to the source. An on-chip bias generator

establishes dc input bias voltages of around 1.4 V and centers

the output common-mode levels at 0.9 V (VDD/2). A capacitor,

CLG, of the same value as the input coupling capacitor, CS, is

connected from the LG-x pin to ground.

LI-X

CLG

CFB

CSH

LG-X

LO-X

LOSW

RFB1

RFB2

Figure 34. Simplified LNA Schematic

The LNA supports differential output voltages as high as 2 V p-p

with positive and negative excursions of ±0.5 V from a

common-mode voltage of 0.9 V. The LNA differential gain sets

the maximum input signal before saturation. One of three gains

is set through the SPI. The corresponding input full-scale for

the gain settings of 5, 6, or 8 is 400 mV p-p, 333 mV p-p, and

250 mV p-p, respectively. Overload protection ensures quick

recovery time from large input voltages. Because the inputs are

capacitively coupled to a bias voltage near midsupply, very large

inputs can be handled without interacting with the ESD protection.

Low value feedback resistors and the current-driving capability

of the output stage allow the LNA to achieve a low input-referred

noise voltage of 1.2 nV/√Hz. This is achieved with a current

consumption of only 16 mA per channel (30 mW). On-chip

resistor matching results in precise single-ended gains critical

for accurate impedance control. The use of a fully differential

topology and negative feedback minimizes distortion. Low HD2

is particularly important in second harmonic ultrasound imaging

applications. Differential signaling enables smaller swings at

each output, further reducing third-order distortion.

Active Impedance Matching

The LNA consists of a single-ended voltage gain amplifier with

differential outputs and the negative output externally available.

For example, with a fixed gain of 6 (15.6 dB), an active input

termination is synthesized by connecting a feedback resistor

between the negative output pin, LO-x, and the positive input

pin, LI-x. This technique is well known and results in the input

resistance shown in Equation 2, where A/2 is the single-ended

gain or the gain from the LI-x inputs to the LO-x outputs.

)

(

(2)

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