AD9271 datasheet(20/58 Pages) AD

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AD9271

Preliminary Technical Data

Rev. PrA | Page 20 of 58

THEORY OF OPERATION

ULTRASOUND

The primary application for the AD9271 is medical ultrasound.

Figure 32 shows a simplified block diagram of an ultrasound

system. A critical function of an ultrasound system is the time

gain control (TGC) compensation for physiological signal

attenuation. Because the attenuation of ultrasound signals is

exponential with respect to distance (time), a linear-in-dB VGA

is the optimal solution.

Key requirements in an ultrasound signal chain are very low

noise, active input termination, fast overload recovery, low

power, and differential drive to an ADC. Because ultrasound

machines use beam-forming techniques requiring large binary-

weighted numbers (for example, 32 to 512) of channels, the

lowest power at the lowest possible noise is of key importance.

Most modern machines use digital beam forming. In this

technique, the signal is converted to digital format immediately

following the TGC amplifier; beam forming is done digitally.

The ADC resolution of 12 bits with up to 50 MSPS sampling

satisfies the requirements of both general-purpose and high-

end systems.

Power consumption and low cost are of primary importance in

low-end and portable ultrasound machines, and the AD9271 is

designed for these criteria.

For additional information regarding ultrasound systems, refer

to “How Ultrasound System Considerations Influence Front-End

Component Choice,” Analog Dialogue, Volume 36, Number 3,

May–July 2002.

BEAMFORMER

CENTRAL CONTROL

Rx BEAMFORMER

(B AND F MODES)

COLOR

DOPPLER (PW)

PROCESSING

(F MODE)

IMAGE AND

MOTION

PROCESSING

(B MODE)

SPECTRAL

DOPPLER

PROCESSING

MODE

DISPLAY

AUDIO

OUTPUT

TX BEAMFORMER

CW (ANALOG)

BEAMFORMER

TRANSDUCER

ARRAY

128, 256 ETC.

ELEMENTS

BIDIRECTIONAL

CABLE

MUX/

DEMUX

T/R

SWITCHES

TX HV AMPs

MULTICHANNEL

TGC USES MANY VGAs

TGC

TIME GAIN COMPENSATION

AD9271

AAF

VGA

LNA

ADC

Figure 32. Simplified Ultrasound System Block Diagram

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