AD9271 datasheet(12/58 Pages) AD

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AD9271

Preliminary Technical Data

Rev. PrA | Page 12 of 58

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

LI-F

LG-F

LO-F

LI-G

LG-G

LO-G

AVDD

CLK–

CLK+

AVDD

LI-E

LG-E

AVDD

LI-H

LG-H

LO-H

AVDD

LOSW-F

LOSW-G

LOSW-H

AD9271

TOP VIEW

(Not to Scale)

EXPOSED PADDLE, PIN 0

(BOTTOM OF PACKAGE)

PIN 1

INDICATOR

AVDD

LI-A

LG-A

LOSW-A

LI-B

LG-B

LO-B

AVDD

SDIO

SCLK

CSB

AVDD

LI-C

LG-C

LO-C

AVDD

LI-D

LG-D

AVDD

LO-A

LOSW-B

LOSW-C

Figure 4. 100-Lead TQFP

Table 6. Pin Function Descriptions

Pin No.

Name

Description

GND

Ground (Exposed paddle should be tied to a quiet analog ground)

3, 4, 9, 10, 15,

16, 21, 22, 25,

50, 54, 55, 60,

61, 66, 67, 72,

73,92

AVDD

1.8 V Analog Supply

26, 47

DRVDD

1.8 V Digital Output Driver Supply

CWVDD

3.3 V Analog Supply

LI-E

LNA Analog Input for Channel E

LG-E

LNA Ground for Channel E

LO-F

LNA Analog Output for Channel F

LOSW-F

LNA Analog Output Complement for Channel F

LI-F

LNA Analog Input for Channel F

LG-F

LNA Ground for Channel F

LO-G

LNA Analog Output for Channel G

LOSW-G

LNA Analog Output Complement for Channel G

LI-G

LNA Analog Input for Channel G

LG-G

LNA Ground for Channel G

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