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ACT88321 Datasheet(PDF) 27 Page - Qorvo, Inc |
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ACT88321 Datasheet(HTML) 27 Page - Qorvo, Inc |
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27 / 55 page ![]() ACT88321 Advanced PMIC with 3 Bucks, 2 LDOs, and Load Bypass Switches Datasheet Rev. D , June 17, 2022 | Subject to change without notice 27 of 55 www.qorvo.com ® Sequencing The ACT88321 provides the end user with extremely versatile sequencing capability that can be optimized for many different applications. Each of the five outputs has five basic sequencing parameters: input trigger, turn-on delay, turn-off delay, softstart time, and output voltage. Each of these parameters is controlled via the ICs inter- nal registers. Contact Qorvo for custom sequencing configurations. Refer to the Qorvo Application Note de- scribing the Register Map for full details on I2C function- ality and programming ranges. Turn on and Turn off Options. The ACT88321 pro- vides several options for enabling the IC. These include automatic power up when input power is applied as well as power up with a digital input signal to a GPIO. The GPIO can be configured to latch the IC on with an input pulse or to be level triggered. Once powered on, the IC can be turned off with either the GPIO or an I2C com- mand. Input trigger. The input trigger for a regulator is the event that turns that regulator on. Each output can have a separate input trigger. The input trigger can be the in- ternal power ok (POK) signal from one of the other reg- ulators, the internal VIN POK signal, or an external sig- nal applied to a GPIO. This flexibility allows a wide range of sequencing possibilities, including having some of the outputs be sequenced with another external power supply or a control signal from the host. As an example, if the LDO1 input trigger is Buck1, LDO1 will not turn on until Buck1 is in regulation. Input triggers are defined at the factory and can be changed with a cus- tom CMI configuration. The GPIOs can be internally connected to a power supply’s internal POK signal and used as an output to turn on external supplies in the overall sequencing scheme. Turn-on Delay. The turn-on delay is the time between an input trigger going active and the output starting to turn on. Each output’s turn-on delay is configured via its I2C bit ON_DELAY. Turn-on delays can be changed af- ter the IC is powered on, but they are volatile and reset to the factory defaults when power is recycled. Turn-off Delay. The turn-off delay is the time between the input trigger for SLEEP or DPSLP Mode being as- serted and when each output starts to turn off. Each out- put’s turn-off delay is configured via its I2C bit OFF_DE- LAY. Turn-off delays can be changed after the IC is powered on, but they are volatile and reset to the factory defaults when power is recycled. Softstart Time. The softstart time is the time it takes an output to ramp from 10% to 90% to its programmed volt- age. Each output’s softstart time is configured sepa- rately via its I2C softstart bits. Softstart times can be changed after the IC is powered on, but they are volatile and reset to the factory defaults when power is recycled. Output Voltage. Each buck’s output voltage is pro- grammed via its I2C bits Bx_VSET0 and Bx_VSET1. Note that in all conditions Bx_VSET0 must be pro- grammed to a higher voltage than Bx_VSET1. Buck2 regulates to its B2_VSET0 voltage in ACTIVE mode. It can be programmed to regulate to B2_VSET1 in DVS mode, SLEEP state or by a GPIO input. Buck2 can change between B2_VSET0 and B2_VSET1 on-the-fly. Buck1/3 cannot change between Bx_VSET0 and Bx_SET1 on-the-fly. Typically, Buck1/3 operate at the Bx_VSET0 voltage. If a system requires two different voltage options, a GPIO can be programmed as a volt- age pinstrap input. The pinstrap input must be set be- fore the output is enabled. The pinstrap input cannot be changed while the converter is running. If the input is a logic L, Buck1/3 operates from Bx_VSET0 and if the in- put is a logic H, Buck1/3 operate from VSET1. This po- larity can be reversed. The LDOs only have a single reg- ister, LDOx_VSET, to set their output voltage. Each output’s Bx_VSET0 and Bx_VSET1 voltage can be changed via I2C after the IC is powered on, but the new setting is volatile and is reset to the factory defaults when power is recycled. All bucks and LDO output volt- ages can be changed on-the-fly by writing a new value into their I2C registers. The Buck1 and Buck3 output voltage should only be changed by the minimum step size for each I2C write. The Buck2, LDO1, and LDO2 output voltages can be changed with larger step sizes, but Qorvo recommends minimizing the step size change to prevent the IC from detecting an instantane- ous over or under voltage condition due to fault thresh- olds being immediately changed, but output voltage tak- ing time to respond. Dynamic Voltage Scaling On-the-fly dynamic voltage scaling (DVS) for Buck2 is available via the I2C interface. Note that Buck1/3 output voltage cannot be changed on-the-fly. DVS allows sys- tems to save power by quickly adjusting the micropro- cessor performance level when the workload changes. Note that DVS is not a different operating state. The IC operates in the ACTIVE state, but just regulates the out- puts to a different voltage. For fault free operation, the user must ensure output load conditions plus the current required to charge the output capacitance during a DVS |
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