ACT88321 datasheet(34/55 Pages) QORVO

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ACT88321

Advanced PMIC with 3 Bucks, 2 LDOs, and Load Bypass Switches

Datasheet Rev. D , June 17, 2022 | Subject to change without notice

34 of 55

www.qorvo.com

Step-down DC/DC Converters

General Description

The ACT88321 contains three fully integrated step-

down converters. Buck1/2 are 4A outputs, while Buck3

is a 2A output. Buck1 is a fixed frequency, current mode

controlled, synchronous PWM converter that achieves

peak efficiencies of up to 96.5%. Buck1 switches at

1.125MHz or 2.25MHz. Buck2/3 are ACOT mode con-

trolled. All bucks are internally compensated, requiring

only three small external components (Cin, Cout, and L)

for operation. They ship with default output voltages that

can be modified via the I2C interface for systems that

require advanced power management functions.

Each buck converter has a dedicated input pin and

power ground pin. Each buck converter must have a

dedicated input capacitor that is optimally placed to min-

imize its power routing loops. Note that even though

each buck converter has separate inputs, all buck con-

verter inputs must be connected to the same voltage

potential.

Buck1 is configurable as a bypass switch for systems

with a 3.3V bus voltage. The bypass switch provides full

sequencing capability by allowing the 3.3V bus to be

used as the input to the other supplies and still be

properly sequenced to the downstream load.

The ACT88321 buck regulators are highly configurable

and can be quickly and easily reconfigured via I2C. This

allows them to support changes in hardware require-

ments without the need for PCB changes. Examples of

I2C functionality are given below:

Real-time power good, OV, and current limit status

Ability to mask individual faults

Dynamically change output voltage

On/Off control

Softstart ramp

DVS Slew rate control

Switching delay and phase control

Low power mode

Overcurrent thresholds

Refer to Qorvo’s Register Map Definition application

note for full details on I2C functionality and programming

ranges.

Operating Mode – Buck1

By default, Buck1 operates in fixed-frequency PWM

mode at medium to heavy loads, then transitions to dis-

continuous conduction mode, DCM, at light loads to

save power. DCM mode reduces conduction losses by

preventing the inductor current from going negative.

To further optimize efficiency and reduce power losses

at extremely light loads, an additional lower power mode,

LPM, is available. LPM minimizes quiescent current in

between switching cycles. This reduces input current to

approximately 40µA in LPM mode. Light load output

voltage ripple increases from approximately 5mV to

10mV when in LPM mode. Light load voltage droop

when going from light load to heavier loads is only in-

creased by 2-3mV when in LPM mode. LPM allows the

customer to test the IC in their use case and optimize

the balance between power consumption, voltage ripple,

and transient response in their system. Setting DISLPM

= 0 enables LPM while setting DISLPM = 1 disables

LPM.

BUCK1 ULPM

The ACT88321 incorporates an ultra-low power mode,

ULPM, that provides significant efficiency improve-

ments at very light loads. This improvement can be as

much as 8% with a 2mA load. ULPM mode reduces the

buck converters quiescent current from ~40µA to ~10µA.

ULPM mode helps systems like SSDs achieve very low

power loss at extremely light loads, which is a require-

ment in their standby modes. ULPM mode regulates the

output voltage between 99% to 101% of the setpoint.

When the output voltage increases to 101%, the buck

converter shuts down to save quiescent current until the

output voltage drops to 99%. It then turns back on and

increases the output voltage to 101% again. ULPM

mode should only be used when the load current is less

than 50mA. With higher load currents, the output volt-

age drop can trigger UVLO before the converter can re-

act. Using it with greater than 50mA results in much

lower efficiencies than standard PWM or LPM mode op-

eration. Note that ULPM mode must be manually ena-

bled after entering SLEEP/DPSLP mode and disabled

before leaving SLEEP/DPSLP mode. After entering

SLEEP or DPSLP modes and the load current has

dropped, enable ULPM by setting DIS_LPM=0. Change

DIS_LPM back to 1 before leaving SLEEP or DPSLP

mode or before increasing the output current.

ACT88321 Datasheet(PDF) 34 Page - Qorvo, Inc

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