ACT88321 datasheet(32/55 Pages) QORVO

32 / 55 page

ACT88321

Advanced PMIC with 3 Bucks, 2 LDOs, and Load Bypass Switches

Datasheet Rev. D , June 17, 2022 | Subject to change without notice

32 of 55

www.qorvo.com

VCCF

VCCGQ33

VCCK

LDO_1.8V

VIN

VCCFQ

DDR

RESET

Timer Starts

Timer Expired

100ms

POR

State

ROM

State

ISP Ready

GPIO_IN

ROM Only

GPIO_OUT

Power

Recycle

Figure 6: ROM State

GPIO Wake up Mode

All GPIOs can be configured to force the IC into and out

of DPSLP mode. Any number of GPIOs can be config-

ured for this functionality. Please see the DPSLP State

section for details.

Mode Function (Buck1 Bypass Mode)

A GPIO can be configured for the MODE function. Pull-

ing the MODE pin to ground configures Buck1 as a

switching converter. Pulling MODE pin high configures

Buck1 as a bypass switch. The MODE pin must be fixed

at power up and cannot be changed. The MODE func-

tion, when enabled by the IC’s CMI, allows a single IC

to support both operating modes. The customer can se-

lect one mode or the other by a resistor stuffing option.

Pin Descriptions

The ACT88321 input and output pins are configurable

via CMI configurations. The following descriptions refer

to the basic pin functions and capabilities. Refer to the

CMI Options section in the back of the datasheet for

specific pin functionality for each CMI.

VIN_Bx

VIN_Bx pins are the dedicated input power pins to the

buck converters. Each buck converter must be by-

passed directly to its PGNDx pin on the top PCB layer

with a high-quality ceramic capacitor. Refer to the Step-

down DC/DC Converters section for more details.

AVIN

AVIN is the input power to LDO2. It also powers the IC’s

analog circuitry. AVIN must be bypassed directly to

AGND on the top PCB layer with a 1uF ceramic capac-

itor. AVIN must be the highest voltage applied to the IC.

VIN_LDO

This is the dedicated input power to the LDO1.

VIN_LDO must be bypassed directly to AGND on the

top PCB layer with a 1uF ceramic capacitor.

GPIOx

The ACT88321 has 4 GPIO pins. The GPIOs allow a

variety of functions to be implemented. They can be

used as inputs or open drain outputs. The GPIOs do not

have push-pull functionality. Their polarity can also be

changed. These options allow implementation of a vari-

ety of system functions plus flexibility of functions tied to

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