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XRT86VL32IB Datasheet(PDF) 33 Page - Exar Corporation |
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XRT86VL32IB Datasheet(HTML) 33 Page - Exar Corporation |
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33 / 153 page ![]() XRT86VL3X 26 REV. 1.2.2 T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION 3.8 Transmit MOS (Message Oriented Signaling) Processor The Transmit LAPD controller implements the Message-Oriented protocol based on ITU Recommendation Q.921 Link Access Procedures on the D-channel. It provides the following functions. • Zero stuffing • T1/E1 transmitter interface • Transmit message buffer access • Frame check sequence generation • IDLE flag insertion • ABORT sequence generation Two 96-byte buffers in shared memory are allocated for each LAPD to reduce the frequency of microprocessor interrupts and alleviate the response time requirement for a microprocessor to handle each interrupt. There are no restrictions on the length of the message. However the 96-byte buffer is deep enough to hold one entire LAPD path or test signal identification message. 3.8.1 Discussion of MOS Message-Oriented signals sent by the transmit LAPD Controller are messages conforming to ITU Recommendation Q.921 LAPD protocol. There are two types of Message-Oriented signals. One is a periodic performance report generated by the source or sink T1/E1 terminals as defined by ANSI T1.403. The other is a path or test signal identification message that may be optionally generated by a terminal or intermediate equipment on a T1/E1 circuit. The message structures of the performance report and path or test signal identification message are shown in Figure 33 for format A and format B respectively. |
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