XRT86VL32IB datasheet(93/153 Pages) EXAR

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XRT86VL3X

REV. 1.2.2

T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION

In Extended Super-Frame framing mode, frame number 6, 12, 18 and 24 are signaling frames. In these

frames, the least significant bit of all twenty-four timeslots is 'robbed' to carry call state information. The bit in

frame 6 is called the A bit, the bit in frame 12 is called the B bit, the bit in frame 18 is called the C bit and the bit

in frame 24 is called the D bit. The combination of A, B, C and D defines the state of the call for the particular

timeslot that these signaling bits are located in.

8.3.1

Configure the framer to transmit Robbed-bit Signaling

The XRT86VL3x framer supports transmission of Robbed-bit Signaling in ESF, SF and SLC®96 framing

formats. Signaling bits can be inserted into the outgoing DS1 frame through the following:

• Signaling data is inserted from Transmit Signaling Control Registers (TSCR) of each timeslot

• Signaling data is inserted from TxSig_n pin

• Signaling data is embedded into the input PCM data coming from the Terminal Equipment

8.3.2

Insert Signaling Bits from TSCR Register

The four most significant bits of the Transmit Signaling Control Register (TSCR) of each timeslot can be used

to store outgoing signaling data. The user can program these bits through the microprocessor access. If the

XRT86VL3x framer is configured to insert signaling bits from the TSCR registers, the DS1 Transmit Framer

block will strip off the least significant bits of each time slot in the signaling frames and replace it with the

signaling bit stored inside the TSCR registers. The insertion of signaling bits into PCM data is done on a per-

channel basis.

In SF or SLC®96 mode, the user can control the XRT86VL3x framer to transmit no signaling (transparent),

two-code signaling, or four-code signaling. Two-code signaling is done by substituting the least significant bit

(LSB) of the specific channel in frame 6 and 12 with the content of the Signaling bit A of the specific TSCR

Four-code signaling is done by substituting the LSB of channel data in frame 6 with the Signaling bit A and the

LSB of channel data in frame 12 with the Signaling bit B of the specific channel's TSCR register. If sixteen-code

signaling is selected in SF format, only the Signaling bit A and Signaling bit B information are used.

In ESF mode, the user can control the XRT86VL3x framer to transmit no signaling (transparent) by disable

signaling insertion, two-code signaling, four-code signaling or sixteen code signaling. Two-code signaling is

done by substituting the least significant bit (LSB) of the specific channel in frame 6, 12, 18 and 24 with the

content of the Signaling bit A of the specific TSCR register.

Four-code signaling is done by substituting the LSB of channel data in frame 6 and frame 18 with the Signaling

bit A and the LSB of channel data in frame 12 and frame 24 with the Signaling bit B of the specific channel's

TSCR register.

FRAME NUMBER

SIGNALING BIT

FRAME NUMBER

SIGNALING BIT

XRT86VL32IB Datasheet(PDF) 93 Page - Exar Corporation