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AD7293 Datasheet(PDF) 51 Page - Analog Devices |
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AD7293 Datasheet(HTML) 51 Page - Analog Devices |
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51 / 79 page ![]() Data Sheet AD7293 Rev. D | Page 51 of 79 LOW LIMIT 1 (PAGE 0x07) Table 64. Low Limit 1 (Page 0x07) Address (Hex) Name Byte1 Access Type1 Default Value1 0x00 No op N/A N/A 0x00 0x01 Page select pointer 1 R/W 0x00 0x02 Conversion command2 1 W N/A 0x03 Result 2 R 0x0000 0x04 DAC enable 1 R/W 0x00 0x05 GPIO 1 R/W 0x00 0x0C Device ID 2 R 0x0018 0x0F Software reset 2 R/W 0x0000 0x10 AVDD low limit 2 R/W 0x0000 0x11 DACVDD-UNI low limit 2 R/W 0x0000 0x12 DACVDD-BI low limit 2 R/W 0x0000 0x13 AVSS low limit 2 R/W 0x0000 0x14 BI-VOUT0MON low limit 2 R/W 0x0000 0x15 BI-VOUT1MON low limit 2 R/W 0x0000 0x16 BI-VOUT2MON low limit 2 R/W 0x0000 0x17 BI-VOUT3MON low limit 2 R/W 0x0000 0x28 RS0+MON low limit 2 R/W 0x0000 0x29 RS1+MON low limit 2 R/W 0x0000 0x2A RS2+MON low limit 2 R/W 0x0000 0x2B RS3+MON low limit 2 R/W 0x0000 1 N/A means not applicable. 2 Not a physical register. AVDD, DAC Supply (DACVDD-UNI/DACVDD-BI), and AVSS Low Limit Registers (Register 0x10 to Register 0x13) These read/write 16-bit registers set the low limits for the four supply channels. BI-VOUT0MON to BI-VOUT3MON Low Limit Registers (Register 0x14 to Register 0x17) These registers store the low limits from the four internal inputs for monitoring the bipolar DAC outputs, although the intention is to monitor the bipolar DAC outputs in open-loop mode or the integrator outputs in closed-loop mode. RSx+MON Low Limit Registers (Register 0x28 to Register 0x2B) These registers store the low limits for the RSx+MON monitoring channels. Table 65. AVDD, DAC Supply, AVSS, BI-VOUTxMON, and RSx+MON Low Limit Registers (Register 0x10 to Register 0x2B) MSB LSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 [D3:D0] B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Reserved |
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