AD7293 datasheet(71/79 Pages) AD

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Data Sheet

AD7293

Rev. D | Page 71 of 79

SERIAL PORT INTERFACE

The AD7293 SPI allows the user to configure the device for

specific functions and operations through an internal structured

DIN, and DOUT. The device is capable of interfacing within a

range of 1.7 V to 5.5 V, which is set by the VDRIVE pin. SCLK is the

serial clock input for the device. All data transfers on DIN or

DOUT take place with respect to SCLK. The chip select input

pin (CS) is an active low control. For the interface to be active,

the chip select must be low. Data is clocked into the AD7293 on

the SCLK rising edge and is loaded into the device MSB first.

The length of each SPI frame can vary according to the command

being sent. A no op command is available for interface flexibil-

ity. Data is clocked out of the AD7293 on DOUT in the same

frame as the read command, on the falling edge of SCLK,

while CS is low. The SCLK and DIN signals are ignored

when CS is high, and the DOUT line becomes high impedance.

INTERFACE PROTOCOL

When reading from or writing to the AD7293, the first byte

contains the address pointer. Bit D7 of the address pointer is the

read (high) and write (low) bit.

Table 112. Address Pointer

R/W

X means don’t care.

Bit D5 to Bit D0 of the address pointer specify the register

address for the read or write operation.

After the address pointer, the data to be written to the device is

supplied in bytes. The register structure of the AD7293 is page

based and divided according to their specific functions. Some

registers are common to all pages, whereas the rest of the

registers are contained within a particular page. To select a

page, write to the 8-bit page select register. When a particular

page is selected, the user does not have to rewrite to the page

select register every time prior to writing to a register from the

same page. Figure 52 to Figure 54 show the read and write data

formats for the AD7293.

For a register write, the read/write bit is zero, and the DOUT

line remains high impedance. Upon completion of a read or

write, the AD7293 is ready to accept a new register address;

alternatively, to terminate the operation, take the CS pin high.

PAGE NUMBER[D7:D0]

PAGE SELECT[D5:D0]

DIN

DOUT

NOTES

1. R/W IS CLEARED WHEN WRITING TO THE PAGE SELECT REGISTER.

2. THE ADDRESS OF THE PAGE SELECT REGISTER IS 0x01.

3. X = DON’T CARE.

Figure 52. Accessing a Page

REG ADDRESS[D5:D0]

R/W

NO OP(0x00) [D7:D0]

DOUT[D7:D0]

DIN

DOUT

NOTES

1. R/W IS SET WHEN READING FROM A REGISTER AND CLEARED WHEN

WRITING TO A REGISTER.

2. X = DON’T CARE.

Figure 53. Accessing an 8-Bit Register

DIN

DOUT

NOTES

1. R/W IS SET WHEN READING FROM A REGISTER AND CLEARED WHEN

WRITING TO A REGISTER.

2. X = DON’T CARE.

REG ADDRESS[D5:D0]

DIN[D15:D8]

DIN[D7:D0]

DOUT[D15:D0]1

R/W

Figure 54. Accessing a 16-Bit Register

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