TMPR4937 datasheet(484/552 Pages) TOSHIBA

484 / 552 page

Chapter 15 Interrupt Controller

15-38

Bit

Mnemonic

Field Name

Explanation

Read/Write

4:0

CAUSE

Interrupt Cause

Interrupt Cause (Default: 0x1F)

These bits specify the interrupt cause that was reported to the TX49/H3

core.

This field becomes undefined if no interrupt request is pending (i.e., the

IF bit is set).

00000: ECC Error

00001: TX49 Write Timeout Error

00010: External INT [0] interrupt

00011: External INT [1] interrupt

00100: External INT [2] interrupt

00101: External INT [3] interrupt

00110: External INT [4] interrupt

00111: External INT [5] interrupt

01000: SIO [0] interrupt

01001: SIO [1] interrupt

01010: DMA0 [0] interrupt

01011: DMA0 [1] interrupt

01100: DMA0 [2] interrupt

01101: DMA0 [3] interrupt

01110: IRC interrupt

01111: PDMAC0 interrupt

10000: PCIC0 interrupt

10001: TMR [0] interrupt

10010: TMR [1] interrupt

10011: TMR [2] interrupt

10100: (Reserved)

10101: NDFMC interrupt

10110: PCIERR interrupt

10111: PCIPME interrupt

11000: ACLC interrupt

11001: ACLCPME interrupt

11010: PCIC1 interrupt

11011: DMA1[0] interrupt

11100: DMA1[1] interrupt

11101: DMA1[2] interrupt

11110: DMA1[3] interrupt

11111: SPI interrupt

Figure 15.4.15 Interrupt Current Status Register (2/2)

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