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TMPR4937 Datasheet(PDF) 483 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 483 Page - Toshiba Semiconductor |
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483 / 552 page ![]() Chapter 15 Interrupt Controller 15-37 15.4.15 Interrupt Current Status Register (IRCS) 0xF6A0 31 17 16 Reserved IF R : Type 1 : Default 15 11 10 8 7 5 4 0 Reserved LVL Reserved CAUSE R R : Type 000 11111 : Default Bit Mnemonic Field Name Explanation Read/Write 31:17 ⎯ ⎯ Reserved ⎯ 16 IF Interrupt Flag Interrupt Flag (Default: 1) This bit indicates the interrupt generation status. 0: Interrupt requests have been generated. 1: Interrupt requests have not been generated R 15:11 ⎯ ⎯ Reserved ⎯ 10:8 LVL Interrupt Level Interrupt Level (Default: 000) These bits specify the level of the interrupt request that was reported to the TX49/H3 core. This field becomes undefined if no interrupt request is pending (i.e., the IF bit is set). 000: Interrupt level 0 001: Interrupt level 1 : : 111: Interrupt level 7 R 7:5 ⎯ ⎯ Reserved ⎯ Figure 15.4.15 Interrupt Current Status Register (1/2) |
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