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TMPR4937 Datasheet(PDF) 515 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 515 Page - Toshiba Semiconductor |
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515 / 552 page  Chapter 21 Electrical Characteristics 21-9 21.5.5 PCI Interface AC characteristics (66 MHz) (Tc = 0 – 70°C, VCCIO = 3.3 V ± 0.2 V, VCCInt = 1.5 V ± 0.1 V, VSS = 0 V) Item Symbol Conditions Min. Max. Unit PCICLKIN Cycle Time (66 MHz) tCYC66 15 30 ns PCICLKIN High Time (66 MHz) tHIGH66 6 ⎯ ns PCICLKIN Low Time (66 MHz) tLOW66 6 ⎯ ns PCICLKIN Slew Rate (66 MHz) tSLEW66 1.5 4 V/ns PCICLK[5:0] Cycle Time (66 MHz) tCYCO66 CL=50 pF 15 30 ns PCICLK[5:0] High Time (66 MHz) tHIGHO66 CL=50 pF 6 ⎯ ns PCICLK[5:0] Low Time (66 MHz) tLOWO66 CL=50 pF 6 ⎯ ns PCICLK[5:0] Skew (66 MHz) tSKEW CL=50 pF, point to point connect 0 1 ns PCI Output Signal*1) Output Delay tVAL66 CL=30 pF 2 8 ns PCI Input Signal* 2) Input Setup Time tSU66 3 ⎯ ns PCI Input Signal* 2) Input Hold Time tHO66 0.5 ⎯ ns ID_SEL, REQ[0]*, GNT[3:0]* Output Delay tVALPP66 CL=30 pF, point-to-point connect 2 8 ns ID_SEL, REQ[3:0]*, GNT[0]* Input Setup Time tSUPP66 Point-to-point connection 5 ⎯ ns ID_SEL, REQ[3:0]*, GNT[0]* Input Hold Time tHOPP66 Point-to-point connection 0 ⎯ ns *1) PCIAD[31:0], C_BE[3:0], PAR, FRAME*, IRDY*, TRDY*, STOP*, DEVSEL*, PERR*, SERR*, M66EN, and PME* *2) PCIAD[31:0] , C_BE[3:0] , PAR, FRAME*, IRDY*, TRDY*, STOP*, DEVSEL*, PERR*, SERR*, M66EN, PME*, LOCK*, and ID_SEL 21.5.6 PCI Interface AC characteristics (33 MHz) (Tc = 0 – 70°C, VCCIO = 3.3 V ± 0.2 V, VCCInt = 1.5 V ± 0.1 V, VSS = 0 V) Item Symbol Condition Min. Max. Unit PCICLKIN Cycle Time (33 MHz) tCYC33 30 40 ns PCICLKIN High Time (33 MHz) tHIGH33 11 ⎯ ns PCICLKIN Low Time (33 MHz) tLOW33 11 ⎯ ns PCICLKIN Slew Rate (33 MHz) tSLEW33 1 4 V/ns PCICLK[5:0] Cycle Time (33 MHz) tCYC33 CL=70 pF 30 40 ns PCICLK[5:0] High Time (33 MHz) tHIGH33 CL=70 pF 11 ⎯ ns PCICLK[5:0] Low Time (33 MHz) tLOW33 CL=70 pF 11 ⎯ ns PCICLK[5:0] Skew (33 MHz) tSKEW CL=70 pF, point to point connect 0 2 ns PCI Output Signal*1) Output Delay tVAL33 CL=70 pF 2 11 ns PCI Input Signal*2) Input Setup Time tSU33 7 ⎯ ns PCI Input Signal* 2) Input Hold Time tHO33 0.5 ⎯ ns ID_SEL, REQ[0]*, GNT[3:0]* Output Delay tVALPP33 CL=70 pF, point to point connect 2 12 ns ID_SEL, REQ[3:0]*, GNT[0]* Input Setup Time tSUPP33 point to point connct 10 ⎯ ns ID_SEL, REQ[3:0]*, GNT[0]* Input Hold Time tHOPP33 point to point connect 0 ⎯ ns *1) PCIAD[31:0], C_BE[3:0] , PAR, FRAME*, IRDY*, TRDY*, STOP*, DEVSEL*, PERR*, SERR*, M66EN, and PME* *2) PCIAD[31:0] , C_BE[3:0] , PAR, FRAME*, IRDY*, TRDY*, STOP*, DEVSEL*, PERR*, SERR*, M66EN, PME*, LOCK*, and ID_SEL |
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