TMPR4938 datasheet(439/716 Pages) TOSHIBA

439 / 716 page

Chapter 14 AC-link Controller

14-15

14.3.8 Interrupt

ACLC generate two kinds of interrupt to the interrupt controller as below.

• ACLC Interrupt

Logical OR of all the valid bits of ACLC Interrupt Masked Status Register (ACINTMSTS) is

connected. Refer to the section 14.4.5.

• ACLCPME Interrupt

This interrupt shows the wake-up from CODEC in AC-link low-power mode.

Refer to the description for ACLC Control Enable Register (ACCTLEN)’s Wake-up Enable

(WAKEUP) bit in section 14.4.1.

14.3.9 AC-link Low-power Mode

The AC’97 specification makes provision for saving power during system suspension by powering-

down both the controller and CODEC except the minimum circuit to detect modem RING/Caller-ID

event and wake up the system. AC’97 CODEC is required to go into the low-power mode when they

receive a special register-write access. In this mode, the AC-link controller must drive all output signals

to low level to allow the CODEC digital I/O power cut.

ACLC provides ‘AC-link low-power mode’ setting. When this mode is enabled by ACLC Control

Enable Register (ACCTLEN)’s Enable AC-link Low-power Mode (LOWPWR) bit, all the output

signals except the ACRESET* signal to the AC-link are forced to low level.

The AC-link will be reactivated out of the low-power mode when the SYNC signal is driven high for

1 µs or longer by the AC-link controller while the BITCLK signal is inactive. The software is

responsible for controlling the length of this period.

ACLC also provides the ‘wake-up’ function. While this function is enabled by ACCTLEN Register’s

Enable Wake-up (WAKEUP) bit, high-level input at any SDIN[x] signal will force ACLCPME interrupt

assertion.

When ACLCPME interrupt is recognized, the software must disable the low-power mode and assert

warm reset to the AC-link via ACCTLEN Register’s Enable Warm Reset (WRESET) bit. After the

warm reset is deasserted, the CODEC will start providing the BITCLK signal, and then ACLC will

generate the SYNC signal for usual AC-link frames.

Refer to section B.5.1 of AC’97 specification revision 2.1 for the power-down and wake-up sequence

in AC-link power-down mode.

TMPR4938 Datasheet(PDF) 439 Page - Toshiba Semiconductor