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TMPR4938 Datasheet(PDF) 455 Page - Toshiba Semiconductor

Part # TMPR4938
Description  64-Bit TX System RISC TX49 Family
PDF  716 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4938 Datasheet(HTML) 455 Page - Toshiba Semiconductor

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Chapter 14 AC-link Controller
14-31
14.4.12 ACLC Slot Disable Register
0xF74C
This register disables independently the AC-link slot data streams.
31
16
Reserved
: Type
: Initial value
15
10
9
8
7
6
5
4
3
2
1
0
Reserved
GPISLT GPOSLT
MODI
SLT
MODO
SLT
Reserved
AUDI
SLT
LFESLT
CENT
SLT
SURR
SLT
AUDO
SLT
W1C
W1C
W1C
W1C
W1C
W1C
W1C
W1C
W1C : Type
: Initial value
Bit
Mnemonic
Field Name
Description
Read/Write
31:10
⎯
Reserved
⎯
GPISLT: Disable GPI slot reception.
W1C
9
GPISLT
Disable GPI slot
reception
W1C
0: No effect
1: Disables GPI slot reception.
GPOSLT: Disable GPO Slot transmission.
W1C
8
GPOSLT
Disable GPO
Slot
transmission
W1C
0: No effect
1: Disables GPO slot transmission.
MODISLT: Disable Modem slot reception.
W1C
7
MODISLT
Disable Modem
slot reception
W1C
0: No effect
1: Disables modem slot reception.
MODOSLT: Disable Modem slot transmission.
W1C
6
MODOSLT
Disable Modem
slot
transmission
W1C
0: No effect
1: Disables modem slot transmission.
5
⎯
Reserved
⎯
AUDISLT: Disable Audio slot reception.
W1C
4
AUDISLT
Disable Audio
slot reception
W1C
0: No effect
1: Disables audio slot reception.
LFESLT: Disable Audio LFE slot transmission.
W1C
3
LFESLT
Disable Audio
LFE slot
transmission
W1C
0: No effect
1: Disables audio LFE slot transmission.
CENTSLT: Disable Audio Center slot transmission.
W1C
2
CENTSLT
Disable Audio
Center slot
transmission
W1C
0: No effect
1: Disables audio Center slot transmission.
SURRSLT: Disable Audio Surround L&R slot transmission.
W1C
1
SURRSLT
Disable Audio
Surround L&R
slot
transmission
W1C
0: No effect
1: Disables audio Surround L&R slot transmission.
AUDOSLT: Disable Audio PCM L&R slot transmission.
W1C
0
AUDOSLT
Disable Audio
PCM L&R slot
transmission
W1C
0: No effect
1: Disables audio PCM L&R slot transmission.
Figure 14.4.9 ACSLTDIS Register
Writing a value into this register needs several BITCLK cycles to take effect. The software must
guarantee that no write access be executed until the previous write access takes effect (completes), by
reading the ACSLTEN.WRPEND bit prior to writing this register. If it is set for a long time, the
BITCLK signal on the AC-link is probably inactive for whatever reason.



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