9
0832F–HIREL–02/07
e2v semiconductors SAS 2007
PC7410
5.
Detailed Specification
This specification describes the specific requirements for the microprocessor PC7410 in compliance with
e2v standard screening.
6.
Applicable Documents
1.
MIL-STD-883: Test methods and procedures for electronics
2.
MIL-PRF-38535: Appendix A: General specifications for microcircuits
The microcircuits are in accordance with the applicable documents and as specified herein.
6.1
Design and Construction
6.1.1
Terminal Connections
Depending on the package, the terminal connections are as shown in Table 12-1 on page 33, Table 6-3
on page 11 and Figure 4-1 on page 8.
6.2
Absolute Maximum Ratings
Notes:
1. Functional and tested operating conditions are given in Table 6-3 on page 11. Absolute maximum ratings are stress ratings
only. Stresses beyond those listed may affect device reliability or cause permanent damage to the device.
2. Caution: VIN must not exceed OVDD or L2OVDD by more than 0.2V at any time including during power-on reset.
3. Caution: L2OV
DD/OVDD must not exceed VDD/AVDD/L2AVDD by more than 2.0V at any time including during power-on reset;
this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
4. Caution: VDD/AVDD/L2AVDD must not exceed L2OVDD/OVDD by more than 0.4V at any time including during power-on reset;
this limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences.
5. V
IN may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 6-1 on page 10.
6. PC7410RXnnnLE (Rev 1.4) and later only. Previous revisions do not support 3.3V OVDD and have a maximum value OVDD of
-0.3 to 2.6V.
Table 6-1.
Absolute Maximum Ratings
(1)
Symbol
Characteristic
Value
Unit
VDD
Core supply voltage
-0.3 to 2.1(4)
V
AV
DD
PLL supply voltage
-0.3 to 2.1(4)
V
L2AVDD
L2 DLL supply voltage
-0.3 to 2.1(4)
V
OV
DD
60x bus supply voltage
-0.3 to 3.465(3)(6)
V
L2OV
DD
L2 bus supply voltage
-0.3 to 2.6(3)
V
VIN
Processor bus input voltage
-0.3 to OVDD + 0,2V
(2)(5)
V
V
IN
L2 bus input voltage
-0.3 to L2OV
DD + 0,2V
(2)(5)
V
V
IN
JTAG signal input voltage
-0.3 to OV
DD + 0,2V
V
TSTG
Storage temperature range
-55 to 150
°C
Rework temperature
260
°C
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