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LAN9313 Datasheet(PDF) 354 Page - SMSC Corporation |
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LAN9313 Datasheet(HTML) 354 Page - SMSC Corporation |
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354 / 398 page  Three Port 10/100 Managed Ethernet Switch with MII Datasheet Revision 1.2 (04-08-08) 354 SMSC LAN9313/LAN9313i DATASHEET 13.3.3.39 Switch Engine Interrupt Mask Register (SWE_IMR) This register contains the Switch Engine interrupt mask, which masks the interrupts in the Switch Engine Interrupt Pending Register (SWE_IPR). All Switch Engine interrupts are masked by setting the Interrupt Mask bit. Clearing this bit will unmask the interrupts. Refer to Chapter 5, "System Interrupts," on page 52 for more information. Register #: 1880h Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31:1 RESERVED RO - 0 Interrupt Mask When set, this bit masks interrupts from the Switch Engine. The status bits in the Switch Engine Interrupt Pending Register (SWE_IPR) are not affected. R/W 1b |
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