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LAN9313 Datasheet(PDF) 49 Page - SMSC Corporation

Part # LAN9313
Description  Three Port 10/100 Managed Ethernet Switch with MII
PDF  398 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9313 Datasheet(HTML) 49 Page - SMSC Corporation

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Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
SMSC LAN9313/LAN9313i
49
Revision 1.2 (04-08-08)
DATASHEET
BP_EN_strap_2
Port 2 Backpressure Enable Strap: Configures the
default value for the Port 2 Backpressure Enable
(BP_EN_2) bit of the Port 2 Manual Flow Control Register
(MANUAL_FC_2). When configured low, backpressure is
disabled. When configured high, backpressure is enabled.
BP_EN_2
FD_FC_strap_2
Port 2 Full-Duplex Flow Control Enable Strap:
Configures the default value of the Port 2 Full-Duplex
Transmit Flow Control Enable (TX_FC_2) and Port 2 Full-
Duplex Receive Flow Control Enable (RX_FC_2) bits in the
Port 2 Manual Flow Control Register (MANUAL_FC_2),
which are used when manual full-duplex control is selected.
When configured low, full-duplex Pause packet detection
and generation are disabled. When configured high, full-
duplex Pause packet detection and generation are enabled.
FD_FC_2
manual_FC_strap_2
Port 2 Manual Flow Control Enable Strap: Configures the
default value of the Port 2 Full-Duplex Manual Flow Control
Select (MANUAL_FC_2) bit in the Port 2 Manual Flow
Control Register (MANUAL_FC_2). When configured low,
flow control is determined by auto-negotiation (if enabled),
and symmetric PAUSE is advertised (bit 10 of the Port x
PHY Auto-Negotiation Advertisement Register
(PHY_AN_ADV_x) is set).
When configured high, flow control is determined by the
Port 2 Full-Duplex Transmit Flow Control Enable
(TX_FC_2) and Port 2 Full-Duplex Receive Flow Control
Enable (RX_FC_2) bits, and symmetric PAUSE is not
advertised (bit 10 of the Port x PHY Auto-Negotiation
Advertisement Register (PHY_AN_ADV_x) is cleared).
MANUAL_FC_2
speed_strap_mii
Port 0(External MII) Speed Select Strap: Together with
the duplex_pol_strap_mii and MII_DUPLEX pins,
configures the base ability values in the Virtual PHY Auto-
Negotiation Link Partner Base Page Ability Register
(VPHY_AN_LP_BASE_ABILITY).
This pin configures the speed for Port 0 when the Virtual
Auto-Negotiation fails. When configured low, 10Mbps is
selected. When configured high, 100Mbps is selected.
Refer to Section 13.1.7.6 and Table 13.6 for more
information.
SPEED_MII
duplex_pol_strap_mii
Port 0(External MII) Duplex Polarity Strap: Configures
the polarity of the MII_DUPLEX pin for Port 0.
If MII_DUPLEX = DUPLEX_POL_MII, full-duplex is
selected.
If MII_DUPLEX != DUPLEX_POL_MII, half-duplex is
selected.
Refer to Section 13.1.7.6 and Table 13.6 for more
information.
DUPLEX_POL_MII
BP_EN_strap_mii
Port 0(External MII) Backpressure Enable Strap:
Configures the default value for the Port 0 Backpressure
Enable (BP_EN_MII) bit of the Port 0(External MII) Manual
Flow Control Register (MANUAL_FC_MII). When
configured low, backpressure is disabled. When configured
high, backpressure is enabled.
BP_EN_MII
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
STRAP NAME
DESCRIPTION
PIN / DEFAULT
VALUE



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