C167CS datasheet(134/517 Pages) INFINEON

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C167CS

Derivatives

Parallel Ports

User’s Manual

7-7

V2.0, 2000-07

The Port Output Control registers POCONx provide the corresponding control bits.

For each feature (edge/driver characteristic and for each port nibble) a 2-bit control field

is provided (i.e. 4 bits for each port nibble). Word ports consume four control nibbles

each, byte ports consume two control nibbles each, where each control nibble controls

4 pins of the respective port.

The general register layout shown below is valid for all POCON registers. Please note

that for byte ports only two pairs of bitfields are provided (see Table 7-2).

Table 7-2 lists the defined POCON registers and the allocation of control bitfields and

port pins.

POCON*

Port Output Control Reg. *

ESFR (F0xxH/yyH)

Reset Value: 0000H

98765

43210

PN3DC

PN3EC

PN2DC

PN2EC

PN1DC

PN1EC

PN0DC

PN0EC

Bit

Function

PNxEC

Port Nibble x Edge Characteristic (Defines the output rise/fall time

tRF)

00:

Fast edge mode, rise/fall times depend on the driver’s dimensioning.

01:

Reduced edge mode.

10:

Reserved.

11:

Reserved.

PNxDC

Port Nibble x Driver Characteristic (Defines the current delivered by

the output)

00:

High Current mode:

Driver always operates with maximum strength.

01:

Low Current mode:

Driver always operates with reduced strength.

10:

Dynamic Current mode:

Driver strength is reduced after the target level has been reached.

11:

Reserved.

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