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C167CS Datasheet(PDF) 170 Page - Infineon Technologies AG

Part # C167CS
Description  16-Bit Single-Chip Microcontroller
PDF  517 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C167CS Datasheet(HTML) 170 Page - Infineon Technologies AG

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C167CS
Derivatives
Parallel Ports
User’s Manual
7-43
V2.0, 2000-07
Alternate Functions of Port 6
A programmable number of chip select signals (CS4 … CS0) derived from the bus
control registers (BUSCON4 … BUSCON0) can be output on 5 pins of Port 6. The other
3 pins may be used for bus arbitration to accomodate additional masters in a C167CS
system.
The number of chip select signals is selected via bitfield CSSEL in register RP0H. During
an external reset register RP0H is configured according to the levels of PORT0.
Software can adjust the number of selected chip select signals via register RSTCON.
Table 7-8 summarizes the alternate functions of Port 6 depending on the number of
selected chip select lines (coded via bitfield CSSEL).
ODP6
P6 Open Drain Ctrl. Reg.
ESFR (F1CEH/E7H)
Reset Value: - - 00H
15
14
13
12
11
10
98765
43210
ODP6
.7
ODP6
.6
ODP6
.5
ODP6
.4
ODP6
.3
ODP6
.2
ODP6
2.1
ODP6
.0
-
-
-
-
-
-
-
-
rw
rw
rw
rw
rw
rw
rw
rw
Bit
Function
ODP6.y
Port 6 Open Drain control register bit y
ODP6.y = 0: Port line P6.y output driver in push/pull mode
ODP6.y = 1: Port line P6.y output driver in open drain mode
Table 7-8
Alternate Functions of Port 6
Port 6 Pin Altern. Function
CSSEL = 10
Altern. Function
CSSEL = 01
Altern. Function
CSSEL = 00
Altern. Function
CSSEL = 11
P6.0
P6.1
P6.2
P6.3
P6.4
Gen. purpose IO
Gen. purpose IO
Gen. purpose IO
Gen. purpose IO
Gen. purpose IO
Chip select CS0
Chip select CS1
Gen. purpose IO
Gen. purpose IO
Gen. purpose IO
Chip select CS0
Chip select CS1
Chip select CS2
Gen. purpose IO
Gen. purpose IO
Chip select CS0
Chip select CS1
Chip select CS2
Chip select CS3
Chip select CS4
P6.5
P6.6
P6.7
HOLD
External hold request input
HLDA
Hold acknowledge output (master mode) or input (slave mode)
BREQ
Bus request output



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