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HD64F36022 Datasheet(PDF) 184 Page - Renesas Technology Corp |
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HD64F36022 Datasheet(HTML) 184 Page - Renesas Technology Corp |
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184 / 384 page ![]() Section 11 Timer W Rev. 4.00 Sep. 23, 2005 Page 158 of 354 REJ09B0025-0400 11.5 Operation Timing 11.5.1 TCNT Count Timing Figure 11.14 shows the TCNT count timing when the internal clock source is selected. Figure 11.15 shows the timing when the external clock source is selected. The pulse width of the external clock signal must be at least two system clock ( φ) cycles; shorter pulses will not be counted correctly. TCNT TCNT input clock Internal clock φ N N+1 N+2 Rising edge Figure 11.14 Count Timing for Internal Clock Source TCNT TCNT input clock External clock φ NN+1 N+2 Rising edge Rising edge Figure 11.15 Count Timing for External Clock Source |
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