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HD64F36022 Datasheet(PDF) 186 Page - Renesas Technology Corp

Part # HD64F36022
Description  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
PDF  384 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F36022 Datasheet(HTML) 186 Page - Renesas Technology Corp

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Section 11 Timer W
Rev. 4.00 Sep. 23, 2005 Page 160 of 354
REJ09B0025-0400
11.5.3
Input Capture Timing
Input capture on the rising edge, falling edge, or both edges can be selected through settings in
TIOR0 and TIOR1. Figure 11.17 shows the timing when the falling edge is selected. The pulse
width of the input capture signal must be at least two system clock (
φ) cycles; shorter pulses will
not be detected correctly.
TCNT
Input capture
input
ø
N–1
N
N+1
N+2
N
GRA to GRD
Input capture
signal
Figure 11.17 Input Capture Input Signal Timing
11.5.4
Timing of Counter Clearing by Compare Match
Figure 11.18 shows the timing when the counter is cleared by compare match A. When the GRA
value is N, the counter counts from 0 to N, and its cycle is N + 1.
TCNT
Compare
match signal
φ
GRA
N
N
H'0000
Figure 11.18 Timing of Counter Clearing by Compare Match



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