SH7101 datasheet(348/560 Pages) RENESAS

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Section 10 Serial Communication Interface (SCI)

Rev.1.00 Sep. 18, 2008 Page 314 of 522

REJ09B0069-0100

10.5.1

Multiprocessor Serial Data Transmission

Figure 10.11 shows a sample flowchart for multiprocessor serial data transmission. For an ID

transmission cycle, set the MPBT bit in SSR to 1 before transmission. For a data transmission

cycle, clear the MPBT bit in SSR to 0 before transmission. All other SCI operations are the same

as those in asynchronous mode.

<End>

[1]

Yes

Initialization

Start transmission

Read TDRE flag in SSR

[2]

Yes

Read TEND flag in SSR

[3]

Yes

[4]

Clear DR to 0

Clear TE bit in SCR to 0;

select the TxD pin

as an output port with the PFC

TDRE = 1

All data transmitted?

TEND = 1

Break output?

Clear TDRE flag to 0

[1] SCI initialization:

Set the TxD pin using the PFC.

After the TE bit is set to 1, 1 is

output for one frame, and

transmission is enabled.

[2] SCI status check and transmit

data write:

Read SSR and check that the

TDRE flag is set to 1, then write

transmit data to TDR. Set the

MPBT bit in SSR to 0 or 1.

Finally, clear the TDRE flag to 0.

[3] Serial transmission continuation

procedure:

To continue serial transmission,

be sure to read 1 from the TDRE

flag to confirm that writing is

possible, then write data to TDR,

and then clear the TDRE flag to

[4] Break output at the end of serial

transmission:

To output a break in serial

transmission, first clear the port

data register (DR) to 0, then

clear the TE bit to 0 in SCR and

use the PFC to select the TxD

pin as an output port.

Write transmit data to TDR and

set MPBT bit in SSR

Figure 10.11 Sample Multiprocessor Serial Transmission Flowchart

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