SH7101 datasheet(352/560 Pages) RENESAS

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Section 10 Serial Communication Interface (SCI)

Rev.1.00 Sep. 18, 2008 Page 318 of 522

REJ09B0069-0100

10.6

Operation in Clocked Synchronous Mode

Figure 10.14 shows the general format for clocked synchronous communication. In clocked

synchronous mode, data is transmitted or received in synchronization with clock pulses. Data is

transferred in 8-bit units. In clocked synchronous serial communication, data on the transmission

line is output from one falling edge of the serial clock to the next. In clocked synchronous mode,

the SCI receives data in synchronization with the rising edge of the serial clock. After 8-bit data is

output, the transmission line holds the MSB state. In clocked synchronous mode, no parity or

multiprocessor bit is added. Inside the SCI, the transmitter and receiver are independent units,

enabling full-duplex communication by use of a common clock. Both the transmitter and the

receiver also have a double-buffered structure, so that data can be read or written during

transmission or reception, enabling continuous data transfer.

Don’t care

One unit of transfer data (character or frame)

Bit 0

Serial data

Synchronization

clock

Bit 1

Bit 3

Bit 4

Bit 5

LSB

MSB

Bit 2

Bit 6

Bit 7

Note: * High except in continuous transfer

Figure 10.14 Data Format in Clocked Synchronous Communication (For LSB-First)

10.6.1

Clock

Either an internal clock generated by the on-chip baud rate generator or an external

synchronization clock input at the SCK pin can be selected, according to the setting of the CKE1

and CKE0 bits in SCR. When the SCI is operated on an internal clock, the serial clock is output

from the SCK pin. Eight serial clock pulses are output in the transfer of one character, and when

no transfer is performed, the clock is fixed high. Note, however, that in receive mode only, the

sync clock will be output until either an overrun error occurs or the RE bit is cleared to 0. Select

the external clock as the clock source to perform reception operations in single character units.

10.6.2

SCI Initialization (Clocked Synchronous Mode)

Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then

initialize the SCI as described in a sample flowchart in figure 10.15. When the operating mode,

transfer format, etc., is changed, the TE and RE bits must be cleared to 0 before making the

change using the following procedure. When the TE bit is cleared to 0, the TDRE flag is set to 1.

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