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SH7101 Datasheet(PDF) 349 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  560 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 349 Page - Renesas Technology Corp

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Section 10 Serial Communication Interface (SCI)
Rev.1.00 Sep. 18, 2008 Page 315 of 522
REJ09B0069-0100
10.5.2
Multiprocessor Serial Data Reception
Figure 10.13 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI operations are the same as in asynchronous mode. Figure
10.12 shows an example of SCI operation for multiprocessor format reception.
MPIE
RxD
RxD
RDR
value
0
D0
D1
D7
1
1
0
D0
D1
D7
0
1
1
1
Data (ID1)
Start
bit
MPB
Stop
bit
Start
bit
Data (Data1)
MPB
Stop
bit
Data (ID2)
Start
bit
Stop
bit
Start
bit
Data (Data2)
Stop
bit
RXI interrupt
request
(multiprocessor
interrupt)
generated
Idle state
(mark state)
RDRF
RDR data read
and RDRF flag
cleared to 0 in
RXI interrupt
processing routine
If not this station’s ID,
MPIE bit is set to 1
again
RXI interrupt request is
not generated, and RDR
retains its state
ID1
(a) Data does not match station’s ID
MPIE
RDR
value
0
D0
D1
D7
1
1
0
D0
D1
D7
0
1
1
1
MPB
MPB
RXI interrupt
request
(multiprocessor
interrupt)
generated
Idle state
(mark state)
RDRF
RDR data read and
RDRF flag cleared
to 0 in RXI interrupt
processing routine
Matches this station’s ID,
so reception continues,
and data is received in RXI
interrupt processing routine
MPIE bit is set to 1
again
ID2
(b) Data matches station’s ID
Data2
ID1
MPIE = 0
MPIE = 0
Figure 10.12 Example of SCI Operation in Reception (Example with 8-Bit Data,
Multiprocessor Bit, One Stop Bit)



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