SH7101 datasheet(371/560 Pages) RENESAS

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Section 11 A/D Converter

Rev.1.00 Sep. 18, 2008 Page 337 of 522

REJ09B0069-0100

11.3.4

A/D Trigger Select Register (ADTSR)

ADTSR enables an A/D conversion started by an external trigger signal.

Bit

Bit Name

Initial Value

R/W

Description

7, 6

—

All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

TRG2S1

TRG2S0

R/W

AD Trigger 2 Select 1 and 0

Enable the start of A/D conversion by A/D2 with a

trigger signal.

00: A/D conversion start by external trigger pin

(

ADTRG) or MTU trigger is enabled

01: A/D conversion start by external trigger pin

(

ADTRG) is enabled

10: A/D conversion start by MTU trigger is enabled

11: A/D conversion start by MMT trigger is enabled

When changing the operating mode, first clear the

TRGE and ADST bits in the A/D control registers

(ADCRs) to 0.

TRG1S1

TRG1S0

R/W

AD Trigger 1 Select 1 and 0

Enable the start of A/D conversion by A/D1 with a

trigger signal.

00: A/D conversion start by external trigger pin

(

ADTRG) or MTU trigger is enabled

01: A/D conversion start by external trigger pin

(

ADTRG) is enabled

10: A/D conversion start by MTU trigger is enabled

11: A/D conversion start by MMT trigger is enabled

When changing the operating mode, first clear the

TRGE and ADST bits in the A/D control registers

(ADCRs) to 0.

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