SH7101 datasheet(154/560 Pages) RENESAS

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Section 8 Multifunction Timer Pulse Unit (MTU)

Rev.1.00 Sep. 18, 2008 Page 120 of 522

REJ09B0069-0100

8.3

The MTU has the following registers. For details on register addresses and register states during

each process, refer to section 19, List of Registers. To distinguish registers in each channel, an

underscore and the channel number are added as a suffix to the register name; TCR for channel 0

is expressed as TCR_0.

Channel 0

• Timer control register_0 (TCR_0)

• Timer mode register_0 (TMDR_0)

• Timer I/O control register H_0 (TIORH_0)

• Timer I/O control register L_0 (TIORL_0)

• Timer interrupt enable register_0 (TIER_0)

• Timer status register_0 (TSR_0)

• Timer counter_0 (TCNT_0)

• Timer general register A_0 (TGRA_0)

• Timer general register B_0 (TGRB_0)

• Timer general register C_0 (TGRC_0)

• Timer general register D_0 (TGRD_0)

Channel 1

• Timer control register_1 (TCR_1)

• Timer mode register_1 (TMDR_1)

• Timer I/O control register _1 (TIOR_1)

• Timer interrupt enable register_1 (TIER_1)

• Timer status register_1 (TSR_1)

• Timer counter_1 (TCNT_1)

• Timer general register A_1 (TGRA_1)

• Timer general register B_1 (TGRB_1)

Channel 2

• Timer control register_2 (TCR_2)

• Timer mode register_2 (TMDR_2)

• Timer I/O control register_2 (TIOR_2)

• Timer interrupt enable register_2 (TIER_2)

• Timer status register_2 (TSR_2)

• Timer counter_2 (TCNT_2)

SH7101 Datasheet(PDF) 154 Page - Renesas Technology Corp